Salih Ergün

A Chaos-Modulated Dual Oscillator-Based Truly Random Number Generator

A novel random number generator (RNG) based on an autonomous continuous-time chaotic oscillator is presented. In the proposed RNG, dual oscillator architecture is used with the chaotic oscillator in order to increase the throughput and to maximize the statistical quality of the output sequence. Mathematical model of the proposed design has been developed, and it has been numerically verified that the generated bit streams passed the four basic tests of FIPS-140-2 test suite. Finally, we have also verified that the bit streams, obtained from the hardware realization of the circuit in the same way, passed the full NIST-800-22 test suite without post processing. Simulation and experimental results, verifying the feasibility of the circuit, are given. The proposed RNG can be realized in integrated circuit.

Modeling and analysis of chaos-modulated dual oscillator-based random number generators

This paper introduces a numerical model for the simulation of chaos-modulated dual oscillator-based random number generators. Random number generation method based on dual oscillator architecture is described. Developed model allows the estimation of the output entropy and bias as a function of design parameters, thus provides determination of these parameters for a continuous-time chaotic source appropriately. Numerical simulations are performed in order to address important design issues and simulation results, verifying the feasibility and the correct operation of the model, are presented. High-performance random number generators can be realized in the light of the numerical model.

A truly random number generator based on a continuous-time chaotic oscillator for applications in cryptography

A non-autonomous chaotic circuit which is suitable for high-frequency IC realization is presented. Simulation and experimental results verifying the feasibility of the circuit are given. We have numerically verified that the bit streams obtained from the stroboscopic Poincare map of the system passed the four basic tests of FIPS-140-1 test suite. We also have verified that the binary data obtained from the hardware realization of this continuous-time chaotic oscillator in the same way pass the full NIST random number test suite. Then, in order to increase the output throughput and the statistical quality of the generated bit sequences, we propose a TRNG design which uses a dual oscillator architecture with the proposed continuous-time chaotic oscillator. Finally we have experimentally verified that the binary data obtained by this oscillator sampling technique pass the tests of full NIST random number test suite for a higher throughput speed. While the throughput data rate obtained by using continuous-time chaotic oscillator alone is effectively 488 bps, it achieves 830 Kbps for the proposed TRNG design, which uses the dual oscillator architecture.

A digital IC Random Number Generator with logic gates only

Random Number Generators with logic gates only are popular among digital IC designers in terms of their speed compatibility and uncomplicated integration to digital platforms. To the best of our knowledge, this paper presents the first ASIC implementation of a Random Number Generator based on Fibonacci and Galois ring oscillators. Prototypes have been designed and fabricated by using HHNECs 0.25µm eFlash process with a supply voltage of 2.5V. Fibonacci and Galois ring oscillators are implemented in combined configuration. A combined configuration, which consists of a Fibonacci ring oscillator with 16 inverters and a Galois ring oscillator with 32 inverters, occupies 0.0048mm2 and dissipates 2.5mW of power which is quite small compared to other well-known random number generators based on digital circuitry. IC design level experiences, measurements, analysis of measurements and statistical test results are also demonstrated. Furthermore, we propose to use several of these oscillators in an xored configuration, in order to speed up and improve the quality of the generated bit stream. We could achieve fulfilled test results from NIST 800-22 test suit after Von Neumann corrector for 7 xored Fibonacci and Galois ring oscillators with a sampling frequency of 125MHz and 31.25Mbps throughput. In addition, increasing the number of xored Fibonacci and Galois ring oscillators from 7 to 8 also fulfills the tests of NIST 800-22 at the same sampling frequency however, without any further post processing. Thus, 125Mbps of throughput, which is the highest data rate to date with fulfilled test results, could be obtained.

IC Postprocessing Stage for Random Number Generators and an Alternative Design Methodology

This paper explains post processing techniques used in random number generators. Popular post processing techniques have been reviewed and integrated by using HHNECs 0.25 um eFlash process with a supply voltage of 2.5V. Furthermore these post processing techniques are compared with each other in point of throughput, simplicity, area occupation and power consumption. An alternative design methodology is also presented for random number generation which considers its underlying entropy source instead of blindly applying complicated post processing techniques. Then, introduced design methodology, which provides sufficient output randomness without any further post-processing necessity, is compared with other implementations. High-performance random number generators can be realized in the light of this design methodology.

Monolithic implementation of a double-scroll chaotic attractor and application to random number generation

This paper presents an IC realization of a simple autonomous continuous-time chaotic oscillator, which realizes the double-scroll-like chaotic equation. Prototype ICs verifying the feasibility and the correct operation of the chaotic oscillator have been designed and fabricated by using HHNECs 0.25µm eFlash process with a supply voltage of 2.5V. Experimental results from a tested IC are given. Implemented circuit occupies 0.115mm2 of area and dissipates 1.125mW of power. Furthermore, the presented chaotic oscillator is used as a core of random number generator, in order to show the usefulness of the circuit and also encourage its usage in the random number generation applications.

Regional random number generator from a cross-coupled chaotic oscillator

A truly random number generator (TRNG) based on a cross-coupled chaotic oscillator is introduced which relies on generating non-invertible bit streams according to regional distributions of underlying chaotic signal. The effect of noise on the chaotic trajectory is analyzed, inclusion of which renders generated bit streams unpredictable, qualifying the proposed chaos based generator to be used as a truly random source. Simulation and experimental results verifying the feasibility and correct operation of the TRNG are given such that generated bit streams fulfill NIST-800-22 statistical test suite without further post-processing. Presented TRNG features much higher and constant throughput rates and allows for offset compensation.

An embedded fingerprint authentication system integrated with a hardware-based truly random number generator

Recent advances in information security requires randomly selected strong keys. Most of these keys are generated by software-based random number generators. However, implementing a Truly Random Number Generator (TRNG) without using a hardware-supported platform is not reliable. In this paper, a fingerprint authentication system using a hardware-based TRNG to produce a private key that encrypts the fingerprint template of a person is presented. The designed hardware can easily be mounted on a standard or embedded PC via its PCI interface to produce random number keys. Random numbers forming the private key is guaranteed to be true because it passes a two-level randomness test evaluated first on the FPGA then on the PC by applying the full NIST test suite. The whole system implements an AES-based encryption scheme to store the persons secret stored on a smart or glossary card safely. The main contribution of the work is the use of new-generation hardware-based TRNGs to enhance the security of a fingerprint authentication system.

A high-speed truly random number generator based on an autonomous chaotic oscillator

A truly random number generator based on an autonomous bipolar-transistor cross-coupled chaotic oscillator is introduced. The effect of noise on the chaotic trajectory is analyzed. Inclusion of noise renders generated bits unpredictable, qualifying the proposed chaos based generator to be used as a truly random source. Simulation and experimental results verifying the feasibility and correct operation of the circuit are given such that generated bits fulfill NIST-800-22 statistical test suite without post-processing. Presented circuit features much higher and constant throughput rates and allows for offset compensation.

A Truly Random Number Generator Based on a Pulse-Excited Cross-Coupled Chaotic Oscillator

A non-autonomous cross-coupled chaotic circuit is presented with its derivation mechanism. To guarantee robust chaotic behavior of the circuit against parameter variations, an ideal set of parameters is determined by constructing bifurcation diagrams. A truly random number generator (TRNG), which relies on generating non-invertible binary sequences according to regional distributions of underlying chaotic signal, is also introduced. Simulation and experimental results verifying the feasibility of the circuit are given. The proposed TRNG offers much higher and constant throughput rates, allows for offset compensation and fulfills the NIST-800-22 statistical test suite without further post-processing.