Samuel Sheng

Low-power CMOS digital design

Motivated by emerging battery-operated applications that demand intensive computation in portable environments, techniques are investigated which reduce power consumption in CMOS digital circuits while maintaining computational throughput. Techniques for low-power operation are shown which use the lowest possible supply voltage coupled with architectural, logic style, circuit, and technology optimizations. An architecturally based scaling strategy is presented which indicates that the optimum voltage is much lower than that determined by other scaling considerations. This optimum is achieved by trading increased silicon area for reduced power consumption. >

A portable multimedia terminal

A personal communications system (PCS) that centers on integration of services to provide access to data and communications using a specialized, wireless multimedia terminal is described. The possible applications and support systems for such a terminal are outlined. Several of the major design issues behind portable multimedia terminals, including spectrally efficient picocellular networking, low-power digital design, video data compression, and integrated wireless RF transceivers, are discussed. It is argued that optimizing performance in each of these areas is crucial in meeting the performance requirements of the overall system and providing a small, lightweight terminal for personal communications.<<ETX>>

A low-power CMOS chipset for spread spectrum communications

In future personal communication services, high-bandwidth multimedia data will be delivered over wireless pico-cellular networks to high densities of users. The system described here is designed to simultaneously supply 1 Mb/s to up to 50 users in a single cell, requiring a system bandwidth in excess of 50 Mb/s. The use of spread-spectrum techniques, in particular direct sequence code-division multiple access (CDMA), provides a multiple-access strategy to maintain parallel, separate streams of real-time data to all users, and to reduce sensitivity to multipath, narrow band fades, and interference present in the radio environment. Three chips in standard digital 0.8 /spl mu/m CMOS technology implement the critical parts of a spread spectrum transceiver: the digital modulator; the analog receiver front-end and ADC; and the digital receiver baseband processor. The transmit system transmitter is based loosely on the US IS-95 digital cellular CDMA standard, but at more than an order of magnitude higher date rate.

Design techniques for portable systems

Principles that can be applied in design of portable electronic systems (e.g., portable TVs, compact disc players, and cordless phones) are reviewed. Power availability, general-purpose computation, user interface hardware, and low power design are considered.<<ETX>>

A prototype user interface for a mobile multimedia terminal

We have shown a prototype user interface for the InfoPad, a portable terminal with multi-modal input and multimedia output. We believe that many of the people who could benefit from inexpensive, portable, networked terminals are not computer experts, and we are therefore designing the InfoPad and its user interface to be more like a notebook than a workstation. The InfoPad’s main features are: ● Portabilityy ●Continuous network connectivity using a highbandwidth radio link ● Pen input with handwriting recognition ● Audio input with speech recognition ● Full-motion video playback with synchronized audio The InfoPad’s unique input and output characteristics offer challenges and opportunities for user interface design. We are prototyping applications and user interfaces to explore how handwriting and voice recognition may best be used together. We believe that the lessons we will learn can be applied to other multi-modal platforms.

Low-power Signal Processing Systems

This paper describes techniques and issues involved in the design of lowpower VLSI circuits and systems. This work has been motivated by emerging battery operated applications that require extreme computation in portable environments. The four degrees of freedom available for the design of low-power VLSI Technology, Circuit Approaches, Architectures, and Algorithms are reviewed and the relative gains to be expected from each are presented.

Modulation, Multiple Access, and How Radio Waves Behave Indoors

To begin, the system design of the high-speed downlink will be discussed in this chapter and the next. Given that an in-building solution is desired, a description of the propagation characteristics of the indoor channel will first be presented. This is followed by a short exposition of the available digital modulation and multiple-access strategies, describing the advantages and disadvantages of each. In Chapter 3, the actual system link specification will be given – in terms of number of users per base-station, transmit bandwidth, modulation strategies – and a discussion of how this specification was devised.

Transmit Architecture and The Baseband Modulator Chip

To begin the discussion of the system implementation, the base station transmit architecture will be described in this chapter and the next. The key functional blocks that need to be implemented are the spread-spectrum digital signal processing (data spreading, scrambling, etc.), baseband pulse shaping, digital-to-analog conversion, filtering, and frequency upconversion to the 1.088 GHz carrier frequency. The hardware partitioning consists of a custom baseband modulator integrated circuit [Peroul94], along with a semicustom board to implement the analog baseband and RF upconversion circuitry [Yee96]. A board-level solution suffices for the transmitter – since this is in the base station, size and power are not nearly as critical, nor is noise performance as extreme an issue.

The Receiver: Analog RF Front-End

The challenge presented by the mobile receiver – gigahertz-band analog performance in addition to digital signal processing at hundreds of megahertz – is the greatest barrier that needs to be surmounted if the vision of a broadband wireless terminal is to be achieved. As an architectural issue, one major design goal is that the analog hardware be simplified as much as possible; since the carrier frequencies are above 1 GHz, the complexity and difficulties in implementation imply that simplifying the circuitry or relaxing the required analog performance should be paramount. Given the tremendous levels of digital computation achievable by today’s scaled MOS technologies, as much as possible of the required signal processing should be implemented at baseband, in the digital domain. Use of such techniques as sampling demodulation and homodyne receiver architectures all present new methods in developing high-performance demodulators, which take advantage of the fact that digital data – spread-spectrum digital data – is being transmitted.

The Receiver: Baseband Spread-Spectrum Digital Signal Processor

Last, but certainly not least, the digital signal processing required to recover the original transmitted data needs to be addressed. From the output of the receiver’s analog front-end, two 4-bit, 128 MHz interleaved streams are emitted: the only processing that has been done so far is to bring the signal to baseband, and A/D converting it into a digital stream. Even beyond sheer data recovery, the issues of timing recovery and carrier frequency recovery have not been addressed, nor has the implementation of such receiver functions as channel estimation, multipath combining, and adjacent cell detection. None of these issues are touched in the analog domain; instead, they are relegated to the baseband signal processor that will be discussed in this chapter. A more detailed description of the prototype circuit implementation can be found in [Stone95]; the discussion in this chapter and the next is intended to focus on the specific system and circuit design tradeoffs that were made, with the next chapter focusing on the design of the core functional block: the digital matched-filter correlator.