Sandro Pinarello

A 31-dBm, high ruggedness power amplifier in 65-nm standard CMOS with high-efficiency stacked-cascode stages

A novel, high ruggedness power amplifier topology in a 65-nm CMOS technology is proposed. The proposed stacked cascode topology uses only standard devices available in a modern triple-well CMOS process to achieve breakdown voltages of more than 18V. The power amplifier stage delivers 28 dBm output power at a power-added efficiency (PAE) of 69.9% from a 3.6V supply. The saturation gain is 18 dB. A watt-level power amplifier for GSM low-band operation with 31-dBm output power and 61% PAE is presented.

MOSFET degradation under DC and RF Fowler-Nordheim stress

Fowler-Nordheim (F-N) stress is reported to be one of the most severe wear-out mechanisms for high-frequency MOSFET applications like PAs and RF switches. Previous studies of this degradation process were limited to the DC-static case only and standard empirical models were proposed. In this work a novel general physical model is developed, which correctly describes the ageing of electrical parameters under DC stress. This is made possible by taking into account the hole injection into the gate oxide. Finally this study extends the understanding of F-N degradation to RF regime. In this case a quasi-static sum of the degradation rate is adopted to accurately model and predict the performance worsening; the wear-out shows no frequency dependency in the range up to 4Ghz.

Impact of DC and RF non-conducting stress on nMOS reliability

The increase of leakage current in deep-submicrometer MOS transistors operated below threshold is becoming a reliability concern for scaled technology nodes. Especially high-power analog applications like high efficiency PAs and RF-switches undergo to strong lateral field when Vg <;Vth. Indeed an increased degradation for these MOS applications was already reported in the state of the art but not completely understood. In this paper a thorough study of the DC non-conducting (NC) stress is presented and a new physical model describing the worsening of the electrical parameter is proposed. This model is suitable for being extended to the high frequency regime by means of a quasi-static sum (QS). For the first time RF stress measurements are conducted in various NC configurations. No frequency dependency is detected up to 4Ghz and the QS model is able to precisely predict the performance degradation.

Frequency response of stress-effects on CMOS power amplifiers

RF Power Amplifiers (PAs) undergo to high electrical stress conditions due to strong lateral field along the channel. Reliability of CMOS PAs is largely studied in literature. Generally is focused in understanding how RF stress can harm the device. Many authors proved that the generation of defects does not have a frequency dependency. In this work the problem is faced from a new point of view. The response of the defects, instead of the generation, is studied over frequency. It is demonstrated that the electrons-trapping by interface states is quenched by increasing the operation frequency. As a consequence the performance of the PA are recovered. This finding points out for the first time the possibility of relaxing the reliability constrains when operating in RF regime.