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Dive into the research topics where Sang-Myeon Han is active.

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Featured researches published by Sang-Myeon Han.


Journal of The Electrochemical Society | 2007

Influence of Solvent on the Film Morphology, Crystallinity and Electrical Characteristics of Triisopropylsilyl Pentacene OTFTs

Yong-Hoon Kim; Yong Uk Lee; Jeong-In Han; Sang-Myeon Han; Min-Koo Han

The thin-film morphology, degree of crystallinity, as well as the electrical properties of triisopropylsilyl (TIPS) pentacene organic thin-film transistors (OTFTs) were significantly influenced by the solvent used for spin-coating a TIPS pentacene layer. The TIPS pentacene films spin-coated from solvents having high boiling points (chlorobenzene and xylene) showed dendritelike morphology and a higher degree of crystallinity, while TIPS pentacene spin-coated from solvent having a low boiling point (chloroform) showed amorphous-like morphology and a lower degree of crystallinity. The field-effect mobility of OTFTs fabricated from chlorobenzene was 4 x 10 -2 cm 2 /V s, whereas mobility of 10 -4 to 10 -5 cm 2 /V s was achieved when using chloroform. This implies that the morphology, crystallinity, as well as the electrical properties of TIPS pentacene have a strong dependence on the solvent used for spin-coating.


Proceedings of the IEEE | 2005

Poly-Si TFT Fabricated at 150 deg C Using ICP-CVD and Excimer Laser Annealing

Sang-Myeon Han; Min-Cheol Lee; Moon-Young Shin; Joong-Hyun Park; Min-Koo Han

We fabricated poly-Si thin-film transistors at 150/spl deg/C using inductively coupled plasma (ICP) chemical vapor deposition (CVD) and excimer laser annealing (ELA). An Si film deposited by ICP-CVD was recrystallized using ELA, and a poly-Si film with large grains exceeding 5000 /spl Aring/ in diameter was fabricated. An SiO/sub 2/ film with a high breakdown field was deposited by ICP-CVD. A high mobility exceeding 100 cm/sup 2//Vs and a low subthreshold swing of 0.76 V/dec were successfully achieved.


SID Symposium Digest of Technical Papers | 2003

P‐71: OLED Pixel Design Employing a Novel Current Scaling Scheme

Jae-Hoon Lee; Woo-Jin Nam; Sang-Myeon Han; Min-Koo Han

A new active matrix organic light emitting diode (AMOLED) pixel design is proposed by employing a novel current scaling scheme and verified by SPICE simulation. The new pixel design scales down the data current more effectively to guarantee less charging time, compared with conventional current mirror structure, as well as compensates the variation of the electrical characteristics of poly-Si TFTs, such as threshold voltage and mobility.


Japanese Journal of Applied Physics | 2009

Nanocrystalline Silicon Thin-Film Transistor Fabricated without Substrate Heating for Flexible Display

Sun-Jae Kim; Sang-Myeon Han; Min-Koo Han

We fabricated nanocrystalline silicon (nc-Si) thin-film transistors (TFTs) without any substrate heating. High quality nc-Si and silicon dioxide films were deposited at room temperature employing an inductively coupled plasma chemical vapor deposition (ICP-CVD) system. For the nc-Si film, a crystalline phase was grown as a columnar structure and the crystalline volume fraction was 27%. On the silicon dioxide film, hydrogen plasma post-treatment was performed, and the electrical characteristics of silicon dioxide film improved owing to charge reduction and the annealing effect. The nc-Si and silicon dioxide films were used for the fabrication of nc-Si TFTs without substrate heating. Although there was no external heating, a mobility of 6.42 cm2·V-1·s-1 was achieved. This result indicates that nc-Si TFTs fabricated without substrate heating may be a suitable devices for a flexible display.


Applied Physics Letters | 2007

Organic thin-film transistors using suspended source/drain electrode structure

Yong-Hoon Kim; Sang-Myeon Han; Woocheul Lee; Min-Koo Han; Yong Uk Lee; Jeong-In Han

The electrical properties of triisopropylsilyl pentacene organic thin-film transistors such as field-effect mobility, on/off ratio, threshold voltage, and subthreshold slope were markedly improved by employing suspended source/drain (SSD) electrode structure. The SSD structure was fabricated by using Cr∕Au double layer where Cr was used as a sacrificial layer. Using the SSD structure, the field-effect mobility in the linear region increases from 0.007to0.29cm2∕Vs, on/off ratio from 104 to 107, threshold voltage decreases from +9to−3V, and subthreshold slope decreases from 4.5to0.6V∕decade.


Japanese Journal of Applied Physics | 2004

Electrostatic Discharge Effects on AlGaN/GaN High Electron Mobility Transistors on Sapphire Substrates

Seung-Chul Lee; Jin-Cherl Her; Sang-Myeon Han; Kwang-Seok Seo; Min-Koo Han

The effects of electrostatic discharge (ESD) on the variation of electrical characteristics of AlGaN/GaN high electron mobility transistors (HEMTs), such as on-current, leakage current of gate and transconductance (gm), have been investigated. The failure phenomena of HEMTs due to the ESD stress have also been studied. We have applied the ESD stress by transmission line pulsing (TLP) method, which is widely used in ESD stress experiments, and measured the electrical characteristics before and after applying ESD stress. The on-current after applying ESD stress was increased because the space between the drain and the gate was narrowed due to the migration of the metal caused by the high electric field and temperature under the ESD stress. The leakage current was decreased and gm was changed slightly. The failure points were located mainly in the middle and on each side of the gate. AlGaN/GaN HEMTs, in contrast with GaAs HEMTs, have been shown to easily fail due to the poor thermal characteristics of the sapphire substrate.


international electron devices meeting | 2003

Poly-Si TFT fabricated at 150/spl deg/C using ICP-CVD and excimer laser annealing for plastic substrates

Min-Cheol Lee; Sang-Myeon Han; Su-Hyuk Kang; Moon-Young Shin; Min-Koo Han

We have fabricated poly-Si TFTs employing ICP-CVD (inductively coupled plasma chemical vapor deposition) and ELA at a very low temperature of 150/spl deg/C. Poly-Si film with large grains exceeding 3000 /spl Aring/ and silicon dioxide film with the interface trap density in the order of 10/sup 11//cm/sup 2/ are deposited by ICP-CVD at 150/spl deg/C. A high mobility exceeding 100 cm/sup 2//Vs with a low sub-threshold swing of 0.7 V/dec was obtained without any post-annealing.


SID Symposium Digest of Technical Papers | 2007

P-12: Enhanced Pentacene OTFTs with Suspended Source/Drain Electrode

Yong-Hoon Kim; Yong Uk Lee; Jeong-In Han; Sang-Myeon Han; Woocheul Lee; Min-Koo Han; Young-Hwan Park; Myung-Hwan Oh; Jungwon Kang

We have proposed and fabricated a new triisopropylsilyl (TIPS) pentacene organic thin-film transistor (OTFT) by employing suspended source/drain (SSD) electrode which successfully improves the electrical properties such as field-effect mobility, on/off ratio, threshold voltage (VTH) and subthreshold slope compared to conventional bottom-contact OTFTs. The SSD electrode was fabricated by using Cr/Au double layer where the Cr was used as a sacrificial layer. By completely etching the Cr layer in the active area, a suspended Au source/drain structure is constructed forming a top-contact-like geometry. The field-effect mobility of ink-jet printed TIPS pentacene OTFT increased from 0.007 cm2/Vs to 0.066 cm2/Vs, on/off ratio increased from 104 to 106, VTH decreased from +9 V to −3 V and subthreshold slope decreased from 4.5 V/decade to 0.9 V/decade.


Japanese Journal of Applied Physics | 2006

Hydrogenated microcrystalline silicon film growth by inductively coupled plasma-chemical vapor deposition on ZrO2 gate dielectric for thin film transistors

Chang-Wook Han; Joong-Hyun Park; Sang-Myeon Han; Min-Koo Han; Ki-Yong Kim; In-Jae Chung; Sun Jin Yun; Jung Wook Lim

Hydrogenated microcrystalline silicon (µc-Si:H) film was fabricated by inductively coupled plasma–chemical vapor deposition (ICP–CVD) at 150 °C on ZrO2 gate dielectric which was made by atomic layer deposition (ALD) method. µc-Si:H film with very thin incubation layer less than 10 nm was deposited on ZrO2 film. Polycrystalline ZrO2 played a role of crystal seed layer to enhance the crystalline fraction of µc-Si:H film. Surface roughness of ZrO2 film increased as deposition temperature of ZrO2 was increased. Rougher surface of ZrO2 film provided nucleation site of µc-Si:H film at early growth stage to reduce the thickness of the incubation layer. The crystalline fraction of µc-Si:H film depended on crystallinity of ZrO2. When µc-Si:H film was deposited on ZrO2 of 100 and 50 nm thickness at 250 °C, (200) and (111) peak intensity was increased respectively.


Electrochemical and Solid State Letters | 2006

Improvement of Silicon Dioxide Film as a Gate Insulator for Poly-Si TFTs Fabricated at 150 ° C with N2O Plasma Pretreatment

Sang-Myeon Han; Moon-Young Shin; Min-Cheol Lee; Joong-Hyun Park; Min-Koo Han

We proposed excimer laser annealing (ELA) process and N 2 O plasma pretreatment to reduce the oxide charge densities as well as increase the breakdown voltage of silicon dioxide film as a gate insulator of poly-Si thin film transistors (TFTs) on flexible substrates where the maximum process temperature should be less than 200°C. The experimental results demonstrate that the N 2 O plasma treatment improved the flatband voltage of silicon dioxide film. The proposed ELA and N 2 O plasma treatment also improved poly-Si TFT characteristics, such as subthreshold swing, leakage current, and on current.

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Min-Koo Han

Seoul National University

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Joong-Hyun Park

Seoul National University

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Sun-Jae Kim

Seoul National University

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Min-Cheol Lee

Seoul National University

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Moon-Young Shin

Seoul National University

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Sang-Geun Park

Seoul National University

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Hee-Sun Shin

Seoul National University

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In-Hyuk Song

Seoul National University

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Won-Kyu Lee

Seoul National University

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