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Dive into the research topics where Sang-Sik Choi is active.

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Featured researches published by Sang-Sik Choi.


Semiconductor Science and Technology | 2011

Robust ESD protection for high brightness GaN LEDs using new TVS Zener diodes

Sang-Sik Choi; Deok-Ho Cho; Chel-Jong Choi; Jong-Suk Kim; Jong-Han Yang; Kyu-Hwan Shim

The electrostatic discharge (ESD) stability of GaN-based LEDs, which are assembled with new transient voltage suppression (TVS) Zener diodes, has been characterized in experiments on reverse leakage current and functionality. Advantageous features of TVS Zener diodes with extremely low differential resistance and low leakage current have enhanced their ESD protection capability, especially at high temperature. The TVS Zener presented an excellent performance in protecting GaN-based LEDs from ESD stress exceeding the human body model ±8 kV at 110 °C. The ESD robustness of the high-temperature stability is analyzed in order to provide proper reliability under hostile environment of massive heat and light delivered from LEDs.


international symposium on consumer electronics | 2014

Ultra low capacitance bidirectional transient voltage suppression device for the protection high speed data line from electrostatic discharge shocks

Daoheung Bouangeune; Young Joo Song; Sengchanh Vilathong; Sang-Sik Choi; Deok-Ho Cho; Chel-Jong Choi; Kyu-Hwan Shim

New ultra low capacitance bidirectional transient voltage suppression (Bi-TVS) devices consist of two parallel unidirectional TVS devices facing opposite directions, have been fabricated for electrostatic discharge (ESD) protection applications. The reduced pressure chemical vapor deposition (RPCVD) technology allows growing uniform thin Si films with various doping conditions and thicknesses of a PIN and TVS diode in one die. This result in a small turn on dynamic resistance of ~0.7 Ω and leakage current below 10-9 A. The employing PIN diode was effective in reducing the capacitance that suppressed down to ~0.6 pF and in leading to the wide signal band pass over 3 GHz. The fabricated Bi-TVS device was capability handled the IEC 610004-2 peak voltage and TLP current in exceeding ±29 kV and ±30 A. The research results guarantee that the new proposed TVS device is very effective in protecting high speed data line against strong and rapid ESD attacks.


international symposium on consumer electronics | 2014

Fabricated RC-Pi type ESD/EMI filter based on transient voltage suppression diode for portable electronic applications

Daoheung Bouangeune; Young Joo Song; Sengchanh Vilathong; Sang-Sik Choi; Deok-Ho Cho; Chel-Jong Choi; Kyu-Hwan Shim

New RC-Pi type ESD/EMI filters were fabricated using the integrated passive devices technology. Unique TVS diodes were employed to improve the electrostatic discharge (ESD) strength of the filters without sacrificing capacitance. The fabricated filter device has a cut off frequency of 270 MHz and the attenuation higher than -30 dB at >1 GHz. ESD testing results demonstrated the filter was capable withstand ±10 kV of IEC 61000-4-2 and handle positive TLP current up to 19 A. This evidence that excellent ESD performance can be found in the filter consist of the small TVS diode dimension of 50×50 μm2. The research results guide that employing TVS diodes are effective in the protection of data communication applications from very strong ESD shocks and noise disturbs.


IEICE Transactions on Electronics | 2008

Stress Effect Analysis for PD SOI pMOSFETs with Undoped-Si0.88Ge0.12 Heterostructure Channel

Sang-Sik Choi; A-Ram Choi; Jae-Yeon Kim; Jeon-Wook Yang; Yong-Woo Hwang; Tae-Hyun Han; Deok Ho Cho; Kyu-Hwan Shim

The stress effect of SiGe p-type metal oxide semiconductor field effect transistors (MOSFETs) has been investigated to compare their properties associated with the Si0.88Ge0.12/Si epi channels grown on the Si bulk and partially depleted silicon on insulator (PD SOI) substrates. The stress-induced changes in the subthreshold slope and the drain induced barrier lowering were observed small in the SiGe PD SOI in comparison to in the SiGe bulk. Likewise the threshold voltage shift monitored as a function of hot carrier stress time presented excellent stability than in the SiGe PD SOI. Therefore, simply in terms of do properties, the SiGe PD SOI looks more immune from electrical stresses than the SiGe bulk. However, the 1/f noise properties revealed that the hot carrier stress could introduce lots of generation-recombination noise sources in the SiGe PD SOI. The quality control of oxide-silicon in SOI structures is essential to minimize a possible surge of 1/f noise level due to the hot carrier injection. In order to improve dc and rf performance simultaneously, it is very important to grow the SiGe channels on high quality SOI substrates.


Transactions on Electrical and Electronic Materials | 2016

High Performance ESD/Surge Protection Capability of Bidirectional Flip Chip Transient Voltage Suppression Diodes

Sakhone Pharkphoumy; Zagarzusem Khurelbaatar; Valliedu Janardhanam; Chel-Jong Choi; Kyu-Hwan Shim; Daoheung Daoheung; Bouangeun Bouangeun; Sang-Sik Choi; Deok-Ho Cho

Copyright ©2016 KIEEME. All rights reserved. This is an open-access article distributed under the terms of the Creative Commons Attribution Non-Commercial License (http://creativecommons.org/licenses/by-nc/3.0) which permits unrestricted noncommercial use, distribution, and reproduction in any medium, provided the original work is properly cited. pISSN: 1229-7607 eISSN: 2092-7592 DOI: http://dx.doi.org/10.4313/TEEM.2016.17.4.196 OAK Central: http://central.oak.go.kr


Journal of Semiconductor Technology and Science | 2014

Effects of Electrostatic Discharge Stress on Current-Voltage and Reverse Recovery Time of Fast Power Diode

Daoheung Bouangeune; Sang-Sik Choi; Deok-Ho Cho; Kyu-Hwan Shim; Sung-Yong Chang; See-Jong Leem; Chel-Jong Choi

Fast recovery diodes (FRDs) were developed using the epitaxial layers grown by low temperature epitaxy technology. We investigated the effect of electrostatic discharge (ESD) stresses on their electrical and switching properties using current-voltage (I-V) and reverse recovery time analyses. The FRDs presented a high breakdown voltage, >450 V, and a low reverse leakage current, A. From the temperature dependence of thermal activation energy, the reverse leakage current was dominated by thermal generation-recombination and diffusion, respectively, at low and high temperature regions. By virtue of the abrupt junction and the Pt drive-in for the controlling of carrier lifetime, the soft reverse recovery behavior could be obtained along with a well-controlled reverse recovery time of 21.12 ns. The FRDs exhibited excellent ESD robustness with negligible degradations in the I-V and the reverse recovery characteristics up to kV of HBM and kV of IEC61000-4-2 shocks. Likewise, transmission line pulse (TLP) analysis reveals that the FRDs can handle the maximum peak pulse current, , up to 30 A in the forward mode and down to - 24 A in the reverse mode. The robust ESD property can improve the long term reliability of various power applications such as automobile and switching mode power supply.


ieee global conference on consumer electronics | 2012

Development of LC-type ESD/EMI filter based on TVS devices for peripheral device applications

Daoheung Bouangeune; Woong-Ki Hong; Sang-Sik Choi; Chel-Jong Choi; Deok-Ho Cho; Kyu-Hwan Shim; Young-Gi Kim

A fully integrated LC-type ESD/EMI filter was developed by the integrated passive devices (IPD) technology. Unique TVS diodes are employed to enhance its performance while maintaining robust ESD characteristics. The reliability and performance of ESD/EMI filter are confirmed based on both attenuation and electrostatic discharge (ESD) strength which could be evaluated by insertion loss (S parameter), ESD and transmission line pulse (TLP) testing method. As the results, the device shows very low leakage current less than 1nA. Its ESD protection and attenuation could be robustness exceed 28 A TLP and ±17 kV IEC 61000-4-2 and achieved as >;35 dB at 800 MHz ~3 GHz, respectively. The cut off frequency obtained of 160 MHz that can ensure high-speed data communication applications.


IEICE Transactions on Electronics | 2008

Selective Epitaxial Growth of SiGe Layers with High Aspect Ratio Mask of Dielectric Films

A-Ram Choi; Sang-Sik Choi; Byung-Guan Park; Dongwoo Suh; Gyungock Kim; Jin-Tae Kim; Jin-Soo Choi; Deok Ho Cho; Tae-Hyun Han; Kyu-Hwan Shim

This paper presents the selective epitaxial growth (SEG) properties of reduced pressure chemical vapor deposition (RPCVD) at low temperatures (LT) of 675-725°C with high aspect ratio mask of dielectric films. The SEG process could be explained in conjunction with the loading effect, the mask pattern shape/size, and the process parameters of RPCVD. The growth rates showed a large non-uniformity up to 40% depending upon the pattern size of the dielectric mask films, but as the SEG film becomes thicker, the growth rate difference converged on -15% between the narrow 2-μm and the wide 100-μm patterns. The evolution of SEG was controlled dominantly by the surface migration control at the initial stage, and converted to the surface topology control. The design of pattern size and distribution with dummy patterns must be useful to accomplish the reliable and uniform LT-SEG.


Journal of The Korean Institute of Electrical and Electronic Material Engineers | 2007

Electrical Properties of SiGe HBTs designed with Bottom Collector and Single Metal Layer Structures

A-Ram Choi; Sang-Sik Choi; Jun-Sik Kim; Seok-Nam Yoon; Sang-Hoon Kim; Kyu-Hwan Shim

This paper presents the electrical properties of SiGe HBTs designed with bottom collector and single metal layer structure for RF power amplifier. Base layer was formed with graded-SiGe/Si structures and the collector place to the bottom of the device. Bottom collector and single metal layer structures could significantly simplify the fabrication process. We studied about the influence of SiGe base thickness, number of emitter fingers and temperature dependence


Journal of The Korean Institute of Electrical and Electronic Material Engineers | 2007

Comparison of Electrical Characteristics of SiGe pMOSFETs Formed on Bulk-Si and PD-SOI

Sang-Sik Choi; A-Ram Choi; Jae-Yeon Kim; Jeon-Wook Yang; Tae-Hyun Han; Deok-Ho Cho; Yong-Woo Hwang; Kyu-Hwan Shim

( frequency from measured data using packaged SiGe HBTs. We will discuss the temperature dependent current flow through the e-b, b-c junctions to understand stability and performance of the device.

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Kyu-Hwan Shim

Electronics and Telecommunications Research Institute

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Deok-Ho Cho

Electronics and Telecommunications Research Institute

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A-Ram Choi

Chonbuk National University

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Chel-Jong Choi

Chonbuk National University

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Jeon-Wook Yang

Electronics and Telecommunications Research Institute

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Byung-Guan Park

Chonbuk National University

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Taek Sung Kim

Chonbuk National University

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Jae-Yeon Kim

Chonbuk National University

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Tae Soo Jeong

Chonbuk National University

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