Sanghoon Bae

High-performance nonhydrogenated nickel-induced laterally crystallized P-channel poly-Si TFTs

High-performance nickel-induced laterally crystallized (NILC) p-channel poly-Si thin-film transistors (TFTs) have been fabricated without hydrogenation. Two different thickness of Ni seed layers are selected to make high-performance p-type TFTs. A very thin seed layer (e.g., 5 /spl Aring/) leads to marginally better performance in terms of transconductance (Gm) and threshold voltage (V/sub th/) than the case of a 60 /spl Aring/ Ni seed layer. However, the p-type poly-Si TFTs crystallized by the very thin Ni seeding result in more variation in both V/sub th/ and G/sub m/ from transistor to transistor. It is believed that differences in the number of laterally grown polycrystalline grains along the channel cause the variation seen between 5 /spl Aring/ NILC TFTs compared to 60-/spl Aring/ NILC TFTs. The 60 /spl Aring/ NILC nonhydrogenated TFTs show consistent high performance, i.e., typical electrical characteristics have a linear field-effect hole mobility of 156 cm/sup 2//V-S, subthreshold swing of 0.16 V/dec, V/sub th/ of -2.2 V, on-off ratio of >10/sup 8/, and off-current of <1/spl times/10/sup -14/ A//spl mu/m when V/sub d/ equals -0.1 V.

Characteristics of amorphous and polycrystalline silicon films deposited at 120 °C by electron cyclotron resonance plasma-enhanced chemical vapor deposition

Amorphous and polycrystalline silicon (poly-Si) films, deposited by an electron cyclotron resonance plasma-enhanced chemical vapor deposition system at 120 °C, have been investigated. All films have been grown with either hydrogen or argon dilution. Using the films with the hydrogen dilution, the effect of rf (13.56 MHz) substrate bias has also been studied. Analysis with x-ray diffraction shows that films grown with Ar dilution and no rf bias do not show any crystallinity while the corresponding films deposited with H2 dilution and no rf bias contain a significant amount of the crystalline phase. With only a 3:1 H2 to silane ratio, highly crystallized films can be grown at 120 °C. In the presence of rf (13.56 MHz) substrate bias, there is a decrease of crystallinity in films. It has been found from cross-sectional transmission electron microscopy that films deposited without rf bias develop a very uniform columnar structure whereas films made with rf bias develop a closely packed, continuous but more amo...

Characteristics of low-temperature silicon nitride (SiNx:H) using electron cyclotron resonance plasma

Abstract Silicon nitride (SiNx:H) thin film deposited at 50°C using an electron cyclotron resonance plasma-enhanced chemical deposition (ECR PECVD) system has been explored. This 50°C silicon nitride deposited on a 150 mm diameter Si wafer shows an acceptable uniformity; ±0.9% of average index of refraction and ±6.5% of average thickness are maintained across 150 mm diameter of the Si wafer. As-deposited 50°C silicon nitrides have a leakage current density value of 2–3×10−9 A/cm2 at electric fields of 2 MV/cm and a breakdown electric field (i.e., field at a current density of 1×10−6 A/cm2) greater than 6 MV/cm. X-ray photoelectron spectroscopy (XPS) analysis displays that chemical bonding structure of this low-temperature ECR silicon nitride is very comparable to that of 250°C PECVD nitride. However, IR absorption data indicate that the low-temperature ECR nitride has more Si–H bonds and fewer N–H bonds than the high-temperature PECVD nitride. These ECR films manifest resistance to buffered oxide etchant (BOE) attack with the etch rates that are slower than 50% of a 250°C PECVD nitride. The lower concentration of N–H bonds may enable these low-temperature nitrides to resist BOE attack.

Nanocrystalline Si thin films with arrayed void-column network deposited by high density plasma

High porosity nanocrystalline Si thin films have been deposited using a high density plasma approach at temperatures as low as 100 °C. These films exhibit the same unique properties, such as visible luminescence and gas sensitivity, that are seen in electrochemically etched Si (i.e., porous Si). The nanostructure consists of an array of rodlike columns normal to the substrate surface situated in a void matrix. We have demonstrated that this structure is fully controllable and have varied the porosity up to ∼90% (as derived from optical reflectance) by varying the deposition conditions. In particular, the impact of plasma power has been found to reduce porosity by increasing the nuclei density and therefore the areal density of columns. Humidity sensors have been demonstrated based on the enhanced conductivity of our films (up to 6 orders of magnitude) in response to increase in relative humidity. Depending on the porosity, the conductivity-relative humidity behavior of our films shows variations which can...

Defined crystallization of amorphous-silicon films using contact printing

Patterned Ni layers are printed on amorphous-silicon (a-Si) films and, during this printing, the metal patterns induce lateral crystallization of the precursor a-Si layer. The printing process consists of simultaneously pressing the Ni printing plate to an a-Si layer and annealing at 550 °C. Printing times of 1 and 3 h are explored. The growth rate of the Ni-induced lateral crystallization is about 8 μm/h in this process. After this printing, Raman spectra show that the resulting polycrystalline-silicon (poly-Si) regions have the characteristic transverse-optical 519 cm−1 phonon peak typical of crystalline silicon. The nonprinted, noncrystallized a-Si areas have the Raman signature of a-Si; i.e., they do not have any peak. The resulting laterally crystallized Si area shows a morphological texture (i.e., a strip-like morphology) originating from the printed Ni area and growing in one direction in transmission electron microscope imaging. In terms of the selective area diffraction pattern (i.e., diffraction...

Low-temperature deposition pathways to silicon nitride, amorphous silicon, polycrystalline silicon, and n type amorphous silicon films using a high density plasma system

Summary form only given, as follows. We report on our low temperature deposition approach to silicon nitride, amorphous silicon (a-Si) and polycrystalline silicon (poly-Si), and doped a-Si films using an Electron Cyclotron Resonance PECVD system. We find that silicon nitride films, deposited at temperatures as low as 30/spl deg/C can be obtained with /spl sim/7/spl times/10/sup -9/ A/cm/sup 2/ leakage currents, flat band voltages of /spl sim/0.6 V, and breakdown field strengths of /spl sim/6 MC/cm. In the case of the a-Si and poly-Si films, we employ X-ray diffraction, UV reflectance, photoluminescence, and electrical conductivity for evaluation. We find that a-Si films, deposited in the 30-120/spl deg/C temperature range, can be obtained with a photo-sensitivity (I/sub photo//I/sub dark/) of /spl sim/10/sup 4/ under AM1 light and that we can also produce polycrystalline films at temperatures as low as 120/spl deg/C on glass and polyethersulfone substrates. In the case of doped materials, conductivities of 10/sup -3/-10/sup -2/ S/cm can be obtained for the as-deposited layers grown at temperatures as low as 40/spl deg/C.

Fabrication of microcrystalline silicon TFTs using a high-density plasma approach

N-channel microcrystalline silicon (mc-Si) thin film transistors (TFTs) were fabricated using a high density plasma (HDP) approach. An electron cyclotron resonance (ECR) plasma source was employed to deposit all of the thin film materials needed for the transistor; that is, intrinsic mc-Si, n-type mc-Si, and dielectric silicon dioxide were grown with the ECR high density plasmas and the deposition rates for these films were in the range of 120-150 /spl Aring//min. The substrate temperatures during these depositions were maintained below 285/spl deg/C. To complete the fabrication of these TFTs, we used only two masks with one alignment. After 1 h annealing under forming gas atmosphere, the mc-Si TFTs perform with linear field effect mobility of 12 cm/sup 2//V-s, on/off ratio of 10/sup 6/, subthreshold swing of 0.3 V/decade, off-current of 4/spl times/10/sup -13/ A//spl mu/m and threshold voltage of 5 V.

Pathway to Depositing Device‐Quality 50°C Silicon Nitride in a High‐Density Plasma System

A process for depositing 50°C silicon nitride films has been developed in a high-density (electron cyclotron resonance) plasma system. While conventional 250°C deposited nitrides have Si-H/N-H bond ratios <1.0, the silane flow rates explored in this process are shown to result in Si-H/N-H bond ratios ≥1.0 and to have little effect on electrical properties in this range. Current densities of the resulting films are below 3 X 10 -9 A/cm 2 for electric fields below 2 MV/cm. Breakdown voltage, defined by I × 10 -6 A/cm 2 , is greater than 6 MV/cm.

Nano- and microchannel fabrication using column/void network deposited silicon

Nano- and microchannels are fabricated using a novel deposited column/void network silicon film as a sacrificial material. This nanostructured silicon consists of nanometer-sized columns defined normal to the substrate in a void matrix, where the voids are continuously connected with each other, forming a network. The void network structure results in a high sacrificial layer etch rate due to the void network-enhanced transport of reactant and reaction products during the etching process, and high effective surface area. The use of our unique deposited column/void network material coupled with lift-off processing results in a manufacturable process for nano- and microchannel and nano- and microcavity fabrication. The approach provides extremely flat surfaces without a chemical–mechanical polishing process, and allows for multiple layers of channel or cavity structures with crossovers.

Low temperature microcrystalline silicon thin film resistors on glass substrates

Abstract Doped microcrystalline silicon (μc-Si) thin film resistors have been processed at low temperatures (