Sangrok Lee

P-25: A LCOS Microdisplay Driver with Frame Buffering Pixels

An 8-bit LCOS microdisplay driver for projection display has been designed and fabricated using AMI 0.5 um double-poly, triple-level metal CMOS process. The driver includes new frame buffer pixels which presents optimized optical characteristics for Field Sequential Color technique, and a mixed mode grayscale method which implements distinct 256 gray levels per color with a simple driver architecture. The voltage at the frame buffer pixels varies from 0 to 4.25 volts. The new frame buffer pixels enables a LCOS microdisplay to improve brightness without the loss of contrast ratio.

Novel frame buffer pixel circuits for liquid-crystal-on-silicon microdisplays

A 32 /spl times/ 16 liquid-crystal-on-silicon (LCOS) backplane with novel frame buffer pixels is designed and fabricated using the AMI Semiconductors 0.5-/spl mu/m double-poly triple-metal CMOS process. The three novel pixel circuits described herein increase the brightness of an XGA LCOS microdisplay by at least 36% without sacrificing image contrast ratio. The increase of brightness is attributed to maximizing overall image view time, allowing an image to be displayed at full contrast while the next image is buffered onto the backplane. The new circuits achieve this by removing charge sharing and charge inducement problems shown in previously proposed frame buffer pixel circuits. Voltages on the pixel electrodes measured through rail-to-rail operational amplifiers with negative feedback vary from 0 to 4.25 V (6-V power source). All data voltage levels remain constant over a frame time with less than 1% drop, thus ensuring maximum contrast ratio. Modeling and experimental measurement on the fabricated chip show that these pixel circuits outperform all others to date based on storage time, data storage level, and potential for highest contrast ratio with maximum brightness.

A novel frame-buffering circuit for liquid crystal on silicon microdisplays

The reduced view time caused by line-at-a-time addressing in field sequential display systems can be mitigated by employing a frame-at-a-time addressing scheme. This drive scheme allows the next image data to be written to the display and buffered in storage while the current frame is being viewed, increasing both system brightness and contrast ratio. We present simulation results and experimental data on frame buffered circuits capable of storing analog data at a pixel, while the previous image frame is being viewed. Employing a global clock at the right time allows a frame at a time to be transferred onto the display.

High-contrast, fast-switching liquid-crystal-on-silicon microdisplay with a frame buffer pixel array

A 64 x 32 liquid-crystal-on-silicon (LCOS) microdisplay with a frame buffer pixel architecture is described. The advantage of frame buffer pixel circuits is an increase in brightness and image contrast ratio. The increase in brightness is attributed to maximizing the overall image viewing time, allowing an image to be displayed at full contrast while the next image is loaded onto the pixels. The LCOS microdisplay employs a fast-switching optically compensated birefringence mode that operates at a 720-Hz frame frequency with a potentially high contrast ratio.

A LCOS microdisplay driver with frame buffer pixels

An 8-bit liquid crystal on silicon microdisplay driver for projection display has been designed and fabricated using AMI 0.5 µm double-poly, triple-level metal CMOS process. The driver includes frame buffering at the pixel level, which presents optimized optical characteristics for field sequential color operation, and a mixed mode gray scale method which implements distinct 256 gray levels per color with a simpler driver architecture.