Sangsu Park

Analog memory and spike-timing-dependent plasticity characteristics of a nanoscale titanium oxide bilayer resistive switching device.

We demonstrated analog memory, synaptic plasticity, and a spike-timing-dependent plasticity (STDP) function with a nanoscale titanium oxide bilayer resistive switching device with a simple fabrication process and good yield uniformity. We confirmed the multilevel conductance and analog memory characteristics as well as the uniformity and separated states for the accuracy of conductance change. Finally, STDP and a biological triple model were analyzed to demonstrate the potential of titanium oxide bilayer resistive switching device as synapses in neuromorphic devices. By developing a simple resistive switching device that can emulate a synaptic function, the unique characteristics of synapses in the brain, e.g. combined memory and computing in one synapse and adaptation to the outside environment, were successfully demonstrated in a solid state device.

Excellent Selector Characteristics of Nanoscale

We herein present a nanoscale vanadium oxide (VO₂) device with excellent selector characteristics such as a high on/off ratio (>; 50), fast switching speed (<; 20 ns), and high current density (>; 10⁶ A/cm2). Owing to extrinsic defects, a large-area device with a 20-nm-thick VO₂ layer underwent an electrical short. In contrast, after scaling the device active area (<; 5 × 10⁴ nm²), excellent switching uniformity was obtained. This can be explained by the reduced defects and the metal-insulator transition of the whole nanoscale VO₂. By integrating a bipolar resistive random access memory device with the VO₂ selection device, a significantly improved readout margin was obtained. The VO₂ selection device shows good potential for cross-point bipolar resistive memory applications.

\hbox{VO}_{2}

We report a simple metal-insulator-metal (MIM)-type selection device that can alleviate the sneak current path in cross-point arrays. By connecting a nanometer-scale Pt/TiO2/TiN selection device to a Pt/TiO2−x/TiO2/W resistive random access memory (RRAM), we could significantly reduce read disturbance from unselected memory cells. This selection device could be easily integrated into an RRAM device, in which it suppressed the sneak current and significantly improved the readout margin compared to that obtained for an RRAM not using a selection device. The introduction of this MIM device can fulfill the requirement for an appropriate selection device for bipolar-type RRAM cross-point applications.

for High-Density Bipolar ReRAM Applications

We report excellent switching uniformity and reliability of RRAM device with ZrOx/HfOx bi-layer films. Precise control of the oxygen vacancy concentration in HfO2 layer was achieved by depositing thin Zr metal (2–15nm) layer. Scaling down active device area (ϕ=50 nm) and film thickness (&#60;2–5 nm) can significantly minimize the extrinsic defects-related non-uniform switching which was normally observed in large area (ϕ >um) device, with higher active layer thickness (>10 nm). Using back-to-back connection of two RRAM devices, we confirmed feasibility of a diode-free cross-point array with a wide readout margin and stable data reading. Considering excellent electrical and reliability characteristics of diode-free RRAM device, shows a great promise for future high density cross-point memory devices

TiO2-based metal-insulator-metal selection device for bipolar resistive random access memory cross-point application

We demonstrated multibit operation using a 250-nm Ir/TiOx/ TiN resistive random access memory by Schottky barrier height engineering. A Schottky barrier was formed by the interface between a high-work-function Ir top electrode and n-type TiOx. The conducting path, which was composed of oxygen vacancies, was generated in a low-resistance state, whereas a Schottky barrier was reproduced in a high-resistance state (HRS) due to the high concentration of oxygen by the electric field. By changing the reset operation voltage, we successfully engineered the Schottky barrier height, resulting in the modulation of the HRS current and demonstrating the feasibility of multibit applications.

Diode-less nano-scale ZrO x /HfO x RRAM device with excellent switching uniformity and reliability for high-density cross-point memory applications

This paper presents a neuromorphic system for visual pattern recognition realized in hardware. A new learning rule based on modified spike-timing-dependent plasticity is also presented and implemented with passive synaptic devices. The system includes an artificial photoreceptor, a Pr0.7Ca0.3MnO3-based memristor array, and CMOS neurons. The artificial photoreceptor consisting of a CMOS image sensor and a field-programmable gate array converts an image into spike signals, and the memristor array is used to adjust the synaptic weights between the input and output neurons according to the learning rule. A leaky integrate-and-fire model is used for the output neuron that is built together with the image sensor on a single chip. The system has 30 input neurons that are interconnected to 10 output neurons through 300 memristors. Each input neuron corresponding to a pixel in a 5 × 6 pixel image generates voltage pulses according to the pixel value. The voltage pulses are then weighted and integrated by the memristors and the output neurons, respectively, to be compared with a certain threshold voltage above which an output neuron fires. The system has been successfully demonstrated by training and recognizing number images from 0 to 9.

Multibit Operation of

Feasibility of a high speed pattern recognition system using 1k-bit cross-point synaptic RRAM array and CMOS-based neuron chip has been experimentally demonstrated. Learning capability of a neuromorphic system comprising RRAM synapses and CMOS neurons has been confirmed experimentally, for the first time.

\hbox{TiO}_{x}

Memristive synapses, the most promising passive devices for synaptic interconnections in artificial neural networks, are the driving force behind recent research on hardware neural networks. Despite significant efforts to utilize memristive synapses, progress to date has only shown the possibility of building a neural network system that can classify simple image patterns. In this article, we report a high-density cross-point memristive synapse array with improved synaptic characteristics. The proposed PCMO-based memristive synapse exhibits the necessary gradual and symmetrical conductance changes, and has been successfully adapted to a neural network system. The system learns, and later recognizes, the human thought pattern corresponding to three vowels, i.e. /a /, /i /, and /u/, using electroencephalography signals generated while a subject imagines speaking vowels. Our successful demonstration of a neural network system for EEG pattern recognition is likely to intrigue many researchers and stimulate a new research direction.

-Based ReRAM by Schottky Barrier Height Engineering

We report, for the first time, the novel concept of ultrathin (~10nm) W/NbO_x/Pt device with both threshold switching (TS) and memory switching (MS) characteristics. Excellent TS characteristics of NbO₂, such as high temperature stability (~160°C), fast switching speed (~22ns), good switching uniformity, and extreme scalability of device area (φ~10nm)/thickness (~10nm) were obtained. By oxidizing NbO₂, we can form ultrathin Nb₂O₅/NbO₂ stack layer for hybrid memory devices with both TS and MS. Without additional selector device, 1Kb cross-point hybrid memory device without SET/RESET disturbance up to 10⁶ cycles was demonstrated.

Neuromorphic Hardware System for Visual Pattern Recognition With Memristor Array and CMOS Neuron

Efforts to develop scalable learning algorithms for implementation of networks of spiking neurons in silicon have been hindered by the considerable footprints of learning circuits, which grow as the number of synapses increases. Recent developments in nanotechnologies provide an extremely compact device with low-power consumption.In particular, nanoscale resistive switching devices (resistive random-access memory (RRAM)) are regarded as a promising solution for implementation of biological synapses due to their nanoscale dimensions, capacity to store multiple bits and the low energy required to operate distinct states. In this paper, we report the fabrication, modeling and implementation of nanoscale RRAM with multi-level storage capability for an electronic synapse device. In addition, we first experimentally demonstrate the learning capabilities and predictable performance by a neuromorphic circuit composed of a nanoscale 1 kbit RRAM cross-point array of synapses and complementary metal-oxide-semiconductor neuron circuits. These developments open up possibilities for the development of ubiquitous ultra-dense, ultra-low-power cognitive computers.