Sanjay Sancheti

Configurable power controller

System and method for reducing skew in complementary signals that can be used to synchronously clock a double data rate output

Delay circuit that scales with clock cycle time

Multi-port memory cell and access method

Data path configurable for multiple clocking arrangements

Circuit and method for dynamic in-rush current control in a power management circuit

Wide frequency range DLL with dynamically determined VCDL/VCO operational states

Method and system for high resolution delay lock loop

Self-timed synchronous pulse generator with test mode

Arbiter circuit and signal arbitration method