Sara Pellegrini

A SPAD-Based QVGA Image Sensor for Single-Photon Counting and Quanta Imaging

A CMOS single-photon avalanche diode (SPAD)-based quarter video graphics array image sensor with 8-μm pixel pitch and 26.8% fill factor (FF) is presented. The combination of analog pixel electronics and scalable shared-well SPAD devices facilitates high-resolution, high-FF SPAD imaging arrays exhibiting photon shot-noise-limited statistics. The SPAD has 47 counts/s dark count rate at 1.5 V excess bias (EB), 39.5% photon detection probability (PDP) at 480 nm, and a minimum of 1.1 ns dead time at 1 V EB. Analog single-photon counting imaging is demonstrated with maximum 14.2-mV/SPAD event sensitivity and 0.06e- minimum equivalent read noise. Binary quanta image sensor (QIS) 16-kframes/s real-time oversampling is shown, verifying single-photon QIS theory with 4.6× overexposure latitude and 0.168e- read noise.

Analysis of Photon Detection Efficiency and Dynamic Range in SPAD-Based Visible Light Receivers

We investigate the photon detection efficiency (PDE) and the dynamic range for digital silicon photomultipliers (dSiPMs) over a selection of design parameters: dSiPM unit cell dead time, PDE, unit cell area and fill factor, number of cells, and total dSiPM active area. Two receiver scaling scenarios are considered: varying the number of cells for 1) a fixed unit cell area or 2) a fixed total dSiPM area. Theoretical and simulated results are confirmed with experimental data from a selection of dSiPMs realised on a test chip in 130-nm CMOS process.

Digital Silicon Photomultipliers With OR/XOR Pulse Combining Techniques

A recently proposed XOR-based digital silicon photomultiplier (dSiPM) is compared against the OR-based counterpart. We show experimental data from a set of single-photon avalanche diode (SPAD) pixel arrays in 130-nm CMOS process with selectable OR tree and XOR tree for direct comparison. We demonstrate how XOR-based dSiPMs solve the limitation caused by monostable circuits and reach higher maximum count rates compared with optimized OR-based dSiPMs. The increased throughput of the SPAD array allows higher sampling rates for the digitization of the light signal enhancing dynamic range and linearity.

Backside illuminated SPAD image sensor with 7.83μm pitch in 3D-stacked CMOS technology

We present the first 3D-stacked backside illuminated (BSI) single photon avalanche diode (SPAD) image sensor capable of both single photon counting (SPC) intensity, and time resolved imaging. The 128×120 prototype has a pixel pitch of 7.83 μm making it the smallest pixel reported for SPAD image sensors. A low power, high density 40nm bottom tier hosts the quenching front end and processing electronics while an imaging specific 65nm top tier hosts the photo-detectors with a 1-to-1 hybrid bond connection [1]. The SPAD exhibits a median dark count rate (DCR) below 200cps at room temperature and 1V excess bias, and has a peak photon detection probability (PDP) of 27.5% at 640nm and 3 V excess bias.

Multiple-event direct to histogram TDC in 65nm FPGA technology

A novel multiple-event Time to Digital Converter (TDC) with direct to histogram output is implemented in a 65nm Xilinx Virtex 5 FPGA. The delay-line based architecture achieves 16.3 ps temporal accuracy over a 2.86ns dynamic range. The measured maximum conversion rate of 6.17 Gsamples/s and the sampling rate of 61.7 Gsamples/s are the highest published in the literature. The system achieves a linearity of -0.9/+3 LSB DNL and -1.5/+5 LSB INL. The TDC is demonstrated in a direct time of flight optical ranging application with 12mm error over a 350mm range.

A Simulation Model for Digital Silicon Photomultipliers

We propose a simulator model to estimate the performance of digital Silicon Photomultipliers (dSiPM) based on Single Photon Avalanche Diodes (SPADs) in terms of detection rate of photons incident on the sensor. The work provides guidelines for efficient array structure depending on: the number of SPADs, fill factor, area of both SPADs and array. A comparison of the main techniques present in the literature to digitally combine multiple outputs into single channel is included with simulated results showing promising higher detection rates for XOR-based dSiPMs. Mathematical expressions are derived to estimate dSiPM parameters such as maximum detection rate and detector dead time as functions of the mentioned design parameters.