Satish C. Saripella

Circuit technique for improved current matching in charge pump PLLS

Low voltage level shifting circuit and low voltage sense amplifier

Read only/random access memory architecture and methods for operating same

Low noise switching regulator

High-speed sense amplifier having variable current level trip point

Reference voltage generator for reading a ROM cell in an integrated RAM/ROM memory device

Dual level wordline clamp for reduced memory cell current

Method, architecture and circuit for writing to and reading from a memory during a single cycle

Method, circuit and/or architecture for reducing gate oxide stress in low-voltage regulated devices

Self-timed sense amplifier evaluation scheme