Savvas G. Chamberlain

Modeling and measurement of minority-carrier lifetime versus doping in diffused layers of n + -p silicon diodes

The results of minority-carrier lifetime measurements in heavily phosphorus-doped n+diffused layers of p-n junction diodes using a spectral response technique are reported in this paper. Exact modeling of current-flow equations, modified to include bandgap reduction due to high carrier concentration and Auger recombination, is used to compute the dependence of diffused-layer photocurrent Jpthon the incident light energy and intensity. The photocurrent in the diffused layer is also obtained by subtracting the theoretical value of the space charge and uniformly doped p-region component from the experimentally measured photocurrent of the diode at each wavelength. Note that all calculated values based on light intensity include computed transmittance/reflectance through the oxide layer at each wavelength. The comparison of the values of Jpthwith Jpexp, using nonlinear least square techniques, then directly gives the lifetime profile in the diffused layer. A simple expression is given for lifetime as a function of doping which may be used in modeling and prediction of device performance. Using this experimental technique it was found that the lifetime in the diffused layer is an order of magnitude less than that corresponding to uniformly doped bulk-silicon values and is very much process dependent; its value being 3.72 × 10-11s for surface concentration of 3.0 × 1020cm-3and increases to 2.9 × 10-8s at doping concentration of 1.0 × 1017cm-3.

Photosensitivity and Scanning of Silicon Image Detector Arrays

The first part of this paper deals with the basic photodiode unit, its principle of operation, and the factors that affect the photodiode and array sensitivity. Experimental results of the planar Si p/sup +/-n photodiode are presented. Design and layout considerations including the integration time are also given. The second part of this paper deals with scanning of photodiode arrays. Detail design considerations are given for a static MOST ring counter. A dynamic shift register with clocked loads for integral scanning is also considered. Design considerations of a realized photosensing matrix with integral scanning are given. Finally, scanning problems of large arrays are briefly considered.

A novel wide dynamic range silicon photodetector and linear imaging array

A novel silicon solid-state photodetector structure utilizing the MOSFET subthreshold effect was conceived, developed, fabricated, and experimental results were obtained. This photodetector device, which can be integrated on the same chip with MOSFET circuits or CCDs, provides an analog voltage signal over a wide dynamic range. Fabricated photodetector devices and arrays showed experimentally, in the visible spectrum, an incoming radiation detection light intensity dynamic range of greater than 107. In addition, the novel photodetector device was used to realize CCD and self-scanned MOSFET linear arrays. In this paper, we describe in detail the theory of the new photodetector device and its applications to form linear imaging arrays. Finally, we present experimental results obtained on developed and fabricated devices and arrays.

Drain-induced barrier-lowering analysis in VSLI MOSFET devices using two-dimensional numerical simulations

In recent publications the drain-induced barrier-lowering (DIBL) effect has been included in the determination of the drain current of short-channel MOSFETs by way of analytical expressions. The validity of these published expressions has not been verified so far for small-geometry devices of different parameters. Further, the relationship between the threshold voltage shift and the barrier lowering due to the DIBL effect has not been clarified in the literature. In our present paper we carried a detailed study of the drain-induced barrier lowering in ion-implanted 1-µm VLSI MOSFET devices, leading to a better understanding and clarification of the fundamental mechanisms involved in the DIBL variation and its effect on the threshold voltage and subthreshold current. Further, we found that the calculated DIBL parameters of the analytical model reported in the literature do not agree with the numerically computed values. Hence we determined a set of new geometry parameters η andB/Afor the DIBL threshold relationship that can be used with the analytical model. Our work stresses the necessity of the use of two-dimensional numerical simulations when accurate evaluation of the DIBL effect in short-channel MOSFETs is required. Also, our results should be useful for calibrating existing analytical MOSFET models. In addition, our data and method could be used as a design tool for performance optimization of micrometer and submicrometer devices.

A Totally Wet Etch Fabrication Technology for Amorphous Silicon Thin Film Transistors

We developed a totally wet etch processing technology for the fabrication of inverted staggered amorphous silicon thin-film transistors (TFTs) and circuits. In this technology we take advantage of highly etch selective KOH and HF base solutions for amorphous silicon and silicon nitride layers. Our technology is simple, reproducible, fully compatible with positive photo-resist lithography techniques, and suitable for mass production of amorphous silicon TFT based circuits. Using this process, we fabricated thin film transistors which have an effective mobility of 0.83 cm 2 V −1 s −1 , threeshold voltage of 2V and on/off current ratio of 10 7 . In this paper we discuss the details of our fabrication process and report on the chemical conditions of the etching and deposition processes.

Potential and electron distribution model for the buried-channel MOSFET

The authors present a novel analytic model for the potential and electron distribution in the channel-depth direction for the buried-channel (BC) MOSFET (metal-oxide-semiconductor field-effect transistor). The purpose of the model is to aid in the fundamental physical understanding of the operational modes of the BC-MOSFET and the mechanisms affecting these modes. Using Poissons equation, individual analytic expressions are formulated to predict the potential distribution and electron concentration profile under conditions of depletion, inversion, pinchoff, and accumulation as a function of the gate bias, substrate bias, and applied channel potential. While the potential distribution in the channel-depth direction enables the band-bending within the device to be visualized, the signal electron concentration profile leads to an easy physical interpretation of the modes of operation and the location of mobile charge relative to the channel surface: this is important for mobility and device speed considerations. In addition, the model can be used for device design. >

MTF simulation including transmittance effects and experimental results of charge-coupled imagers

A modulation transfer function (MTF) model for front-illuminated charge-coupled imagers (CCIs) which takes into account the periodically varying light transmittance of the photoelement array surface is derived. An inexpensive direct MTF measurement technique for CCIs was developed and is described. Experimental MTF measurements confirm the complete MTF model. Spatial resolution measurements and MTF simulation results of practical CCI photoelement array structures show that the periodically varying surface-light transmittance of the photoelement array contributes significantly to the behavior of the overall MTF and aliasing of the imager.

Computer model and charge transport studies in short gate charge-coupled devices

Abstract A computer model has been developed that simulates charge transport of carriers in a surface channel charge-coupled device. This model is based on the charge continuity and current transport equations with a time dependent surface field. The device structure of the model includes a source diffusion an input gate and transfer gate. The present model is the first real simulation of the input scheme of the surface-channel CCDs. The scooping and spilling techniques associated with the charge injection process are simulated by the input diffusion which is included in the model. As an application to a CCD practical problem the present model has been used to study the linearity of the electrical charge injection into surface channel charge-coupled devices. The generated harmonic components of a sinusoidal input are calculated using the transfer characteristics of the input stage obtained from the computer simulation. Using this model the spatial variations of the self-induced fringing field and total currents under the storage and transfer gates were computed. The charge transfer mechanisms for short-gate ( L ≤ 8 μ m) CCDs was investigated. It was found that for short gates the charge transfer efficiency is governed mainly by the fringing field and self-induced current mechanisms. The results of this study help to clarify the mechanism by which the signal-charge level and gate length affect the charge transfer efficiency.

PC-based real-time defect imaging system for high-speed web inspection

PC-based inspection systems for wide web materials have been unable to effectively image fine defects as they are detected. The amount of data produced by highly parallel video inspection cameras can exceed 400 MBytes/sec. The system described in this paper is capable of analyzing and displaying a detected image within seconds of the even using a single frame grabber and a 386 computer. The system can operate at processing speeds of greater than 400 MBytes/sec since it makes use of a novel post processing algorithm within the camera itself. The video cameras are based on TDI (Time Delay and Integration) technology to provide high grey scale resolution at high data rates and low light levels. The system has an adjustable resolution ranging from 2000 to 24,000 pixels per line scanned. The scanning rate is adjustable to a maximum of 20,000 line scans per second.

Numerical methods for the charge transfer analysis of charge-coupled devices

Abstract Charge transfer phenomenon in charge-coupled devices is characterized by a nonlinear partial differential equation of the parabolic type, usually coupled with a very undesirable nonlinear boundary condition. In this study, special treatment is made to the boundaries such that the nonlinearity of the boundary condition does not appear in the final calculation. Four possible finite-difference schemes for this problem are described and results compared. Through numerical experimentations, the linearized Crank-Nicolson scheme is proved to exhibit superior quality and is recommended for the exclusive use in studying the charge transfer phenomenon in CCD. Using this scheme, the charge transfer phenomenon of a two phase overlapping gate CCD has been studied and numerical results are presented. Special emphasis is directed toward the relative importance of the self-induced drift, fringing field drift and thermal diffusion currents. Also, the usefulness of approximating a spatial fringing field pattern by a constant value to the charge transfer phenomenon is discussed.