Scott Hinaga

Improved technique for extracting parameters of low-loss dielectrics on printed circuit boards

The paper is devoted to a methodology and an improved technique of characterization of low-loss dielectrics on printed circuit boards. The technique is based on measuring S-parameters and recalculating them into complex propagation constant. Phase correction is proposed to assure that the phase constant passes through zero at zero frequency. An effect of dielectric loss upon a dielectric constant is considered in the analytical model for dielectric parameter extraction. Dielectric and conductor losses are separated using a model, which includes surface roughness of conductors. Network asymmetry is taken into account in the model. Extracted parameters for frequency-dispersive dielectrics satisfy Kramers-Krönig causality relations. The proposed model allows for extracting dielectric constant and dissipation factor with an increased accuracy.

Differential Extrapolation Method for Separating Dielectric and Rough Conductor Losses in Printed Circuit Boards

Copper foil in printed circuit board (PCB) transmission lines/interconnects is roughened to promote adhesion to dielectric substrates. It is important to characterize PCB substrate dielectrics and correctly separate dielectric and conductor losses, especially as data rates in high-speed digital designs increase. Herein, a differential method is proposed for separating conductor and dielectric losses in PCBs with rough conductors. This approach requires at least three transmission lines with identical, or at least as close as technologically possible, basic geometry parameters of signal trace, distance-to-ground planes, and dielectric properties, while the average peak-to-valley amplitude of surface roughness of the conductor would be different. The peak-to-valley amplitude of conductor roughness is determined from scanning electron microscopy images.

PCB conductor surface roughness as a layer with effective material parameters

A model to substitute conductor surface roughness in printed circuit boards by a layer with an effective material (lossy dielectric) is proposed and tested using the 2D finite-element method (FEM) electromagnetics numerical simulations. The results of numerical modeling of a multilayered structure corresponding to a stripline transmission line with substituted roughness are compared with the experimental results obtained on a TRL-calibrated test vehicle with significant roughness on conductors made of a standard (STD)-roughness copper foil.

Semi-automatic copper foil surface roughness detection from PCB microsection images

Characterization of surface roughness of printed circuit board (PCB) conductors is an important task as a part of signal-integrity analysis on high-speed multi-GHz designs. However, there are no methods to adequately quantify roughness of a signal trace or a power/reference plane layer within finished PCBs. Foil roughness characterization techniques currently available can only be applied to the base foil, prior to its incorporation into a finished board. In a finished PCB, a foil surface is not directly accessible, as it is embedded in the dielectric of the board, and attempting to expose the surface will damage the board and the surface of interest. In this paper, a method of surface roughness quantification from microsectioned samples of PCBs is presented. A small, non-functional area, e.g., a corner of the PCB, can be removed, and the surface roughness of the circuit layers can be assessed without impairing the function of the PCB. In the proposed method, a conductor (a trace or a plane) in the microsectioned sample is first digitally photographed at high magnification. The digital photo obtained is then used as an input to a signal- and image-processing algorithm within a graphical user interface. The GUI-based tool automatically computes and returns the surface roughness values of the layer photographed. The tool enables the user to examine the surface textures of the two sides of the conductor independently. In the case of a trace, the composite value of roughness, based on the entire perimeter of the trace cross-section, can be calculated.

An Analysis of Conductor Surface Roughness Effects on Signal Propagation for Stripline Interconnects

Conductors with a roughened surface have significant effects on high-speed signal propagation on backplane traces designed for a 10+ Gb/s network. An accurate approach to evaluate these effects, including the signal attenuation and the phase delay, is proposed in this paper. A differential extrapolation roughness measurement technique is first used to extract the dielectric properties of the substrate used for lamination, and then a periodic model is used to calculate an equivalent roughened conductor surface impedance, which is then used to modify the transmission line per-unit-length parameters R and L. The results indicate that the conductor surface roughness increases the conductor loss significantly as well as noticeably increasing the effective dielectric constant. This approach is validated using both a full-wave simulation tool and measurements, and is shown to be able to provide robust results for the attenuation constant within ±0.2 Np/m up to 20 GHz.

Improved Experiment-Based Technique to Characterize Dielectric Properties of Printed Circuit Boards

Recently, an experiment-based traveling-wave technique to separate conductor loss from dielectric loss on printed circuit board (PCB) striplines, called the differential extrapolation roughness measurement (DERM), has been proposed. The further development of this procedure is presented in this paper. The new procedure is applied to both loss constant and phase constant, as opposed to the previous procedure, which is applied to only loss constant. A new roughness parameter QR to quantify conductor surface roughness has been proposed, and it is used in the improved procedure. This allows for more accurate extraction of dielectric constant and loss tangent over a wide frequency range. In this paper, the three sets of test vehicles are studied. Each set has three different types of copper surface roughness profiles; two of these sets are known to have the same dielectric, which is used for the validation of the proposed extraction procedure. The new corrected extracted dielectric parameters as functions of frequency for these sets of test vehicles are compared with those obtained using the previous DERM technique.

Differential and extrapolation techniques for extracting dielectric loss of printed circuit board laminates

The experiment-based differential and extrapolation techniques to extract frequency-dependent dielectric loss of printed circuit board laminates are proposed. Separation of dielectric loss from conductor loss on substantially rough copper foils is based on the analysis of frequency (ω) components in dielectric and conductor losses. Smooth conductor loss behaves as √ω, while dielectric loss behaves as ω and ω². However, conductor roughness behaves as √ω, ω, and ω², and these contributions may be lumped into the dielectric loss. A few examples of extracting the unique dielectric loss parameters for PCB test striplines with the same dielectric, but with either different types of foils, or with different widths of the signal traces, are presented.

Surface impedance approach to calculate loss in rough conductor coated with dielectric layer

The analysis presented herein contains closed-form analytical expressions to calculate attenuation in a layered structure “rough metal-dielectric-dielectric”, which is a practically important problem in separating dielectric loss from rough conductor loss in actual PCB stripline geometries, when measuring dielectric constant (Dk) and dissipation factor (Df) using travelling wave S-parameter methods. This approach is based on the surface impedance concept. It is shown that the presence of an epoxy layer on the conductor may affect extracted dielectric parameters, of a PCB substrate, especially the Df data.

Quantification of Conductor Surface Roughness Profiles in Printed Circuit Boards

Conductor (copper) foil surface roughness in printed circuit boards (PCBs) is inevitable due to adhesion with laminate dielectrics. Surface roughness limits data rates and frequency range of application of copper interconnects and affects signal integrity (SI) in high-speed electronic designs. In measurements of dielectric properties of laminate dielectrics using traveling-wave techniques, conductor surface roughness may significantly affect accuracy of measuring dielectric constant (DK) and dissipation factor (DF), especially at frequencies above a few gigahertz, when copper roughness is comparable to skin depth of copper. This paper proposes an algorithm for characterization of copper foil surface roughness. This is done by analyzing the microsection images of copper foils obtained using optical or scanning electron microscopes. The statistics obtained from numerous copper foil roughness profiles allows for introducing a new metric for roughness characterization of PCB interconnects and developing “design curves,” which could be used by SI engineers in their designs.

Effective roughness dielectric in a PCB: Measurement and full-wave simulation verification

Surface roughness topography of printed circuit boards (PCBs) needs to be included in SI simulations in order to accurately predict the insertion loss of the structure. An effective roughness dielectric (ERD) model can be used to substitute an inhomogeneous interface between copper foil and laminate dielectric in a PCB. Herein, this approach is tested for verification using 3D full-wave numerical simulations. These effective roughness dielectric layers with the appropriate complex permittivity are included in the modeling of stripline examples. The parameters of an ambient laminate dielectric free of conductor roughness effects in the stripline are determined using differential extrapolation roughness measurement teachnique (DERM). The agreement of the results of 3D full-wave modeling simulations with the proposed approach and measurements justifies the proposed approach.