James L. Drewniak

Prediction of Power Supply Noise From Switching Activity in an FPGA

Switching current drawn by an integrated circuit (IC) creates dynamic power supply noise on the IC and on the printed circuit board (PCB), which in turn causes jitter in I/ O signals and reduces the maximum clock frequency. Predicting power supply noise is challenging due to the complexity of determining the dynamic current drawn by the IC and the impedance of the power delivery network. In this paper, a methodology is developed for predicting dynamic power supply noise on the PCB resulting from logic activity in a field-programmable gate array (FPGA). Time-domain switching currents within the FPGA are found by performing power simulations of the implemented logic over small time intervals. A high-frequency model of the die-package-PCB power delivery network is developed based on the inductance and capacitance of the package and die and a cavity model description of the PCB. The technique is shown to accurately predict noise on the PCB in both the time and frequency domains.

Modeling absorbing materials for EMI mitigation

In this study, the parameters of magnetic absorbing materials were measured and used to predict their effectiveness at reducing total radiation power from a heat sink. The parameters of absorbing materials were measured using a transmission line method and fitted using the Debye model. By comparing S-parameters and power loss between a simulated and measured microstrip line, the fitted material parameters were validated. The heat sink model has also been investigated to determine the radiation mitigation with lossy materials.

An Analysis of Conductor Surface Roughness Effects on Signal Propagation for Stripline Interconnects

Conductors with a roughened surface have significant effects on high-speed signal propagation on backplane traces designed for a 10+ Gb/s network. An accurate approach to evaluate these effects, including the signal attenuation and the phase delay, is proposed in this paper. A differential extrapolation roughness measurement technique is first used to extract the dielectric properties of the substrate used for lamination, and then a periodic model is used to calculate an equivalent roughened conductor surface impedance, which is then used to modify the transmission line per-unit-length parameters R and L. The results indicate that the conductor surface roughness increases the conductor loss significantly as well as noticeably increasing the effective dielectric constant. This approach is validated using both a full-wave simulation tool and measurements, and is shown to be able to provide robust results for the attenuation constant within ±0.2 Np/m up to 20 GHz.

Design of Homogeneous and Composite Materials From Shielding Effectiveness Specifications

A procedure to synthesize a suitable biphasic composite material from the given Shielding effectiveness (SE) specifications is proposed herein. In particular, this paper presents an analytic approach for calculating parameters of a Debye-like equivalent homogeneous material, which meets the SE requirements in given frequency range. Establishing the relationship of the SE with the intrinsic material and morphological properties of a composite will make it possible to effectively find an equivalent homogeneous lossy Debye-like material model, starting from the given SE frequency characteristic. The Maxwell Garnett mixing rule is used to synthesize a composite made by aligned cylindrical inclusions. A few examples of how this procedure works are presented; validation by time domain numerical simulations is provided.

Improved Experiment-Based Technique to Characterize Dielectric Properties of Printed Circuit Boards

Recently, an experiment-based traveling-wave technique to separate conductor loss from dielectric loss on printed circuit board (PCB) striplines, called the differential extrapolation roughness measurement (DERM), has been proposed. The further development of this procedure is presented in this paper. The new procedure is applied to both loss constant and phase constant, as opposed to the previous procedure, which is applied to only loss constant. A new roughness parameter QR to quantify conductor surface roughness has been proposed, and it is used in the improved procedure. This allows for more accurate extraction of dielectric constant and loss tangent over a wide frequency range. In this paper, the three sets of test vehicles are studied. Each set has three different types of copper surface roughness profiles; two of these sets are known to have the same dielectric, which is used for the validation of the proposed extraction procedure. The new corrected extracted dielectric parameters as functions of frequency for these sets of test vehicles are compared with those obtained using the previous DERM technique.

On finding the optimal number of decoupling capacitors by minimizing the equivalent inductance of the PCB PDN

PCB-PDN design remains a challenge with the reducing noise margins. One aspect of PDN design is finding the number of decoupling capacitors required for each power rail. As more capacitors are added, the mid frequency equivalent inductance in the impedance of the PCB-PDN converges to a minimum value for each placement pattern. This convergence is studied for different placement patterns to find the least number of capacitors required to satisfy a certain convergence criteria. A first principle method is used resonant cavity model for the analysis.

Modeling Electromagnetic Radiation at High-Density Pcb/connector Interfaces

Electromagnetic radiation for a commercial printed circuit board (PCB) connector is investigated in this paper. The simulation models of the connector are shown to be validated by comparing measured and simulated S-parameters. Analytical formulas are provided to calculate the total loss and the radiated power from a PCB/connector structure when material losses are known. The total power loss for the considered geometry is shown to be dominated by material loss rather than radiated power loss. Termination schemes and additional geometry details in the connector model are also studied for their effects on the radiated power.

Causality and delay and physics in real systems

In the present work causality property and physics behind it is analyzed for physical systems. Different methodologies for checking or enforcing causality in both time and frequency domain are discussed. Causality metric for measuring causality violation is introduced. Physical anomaly of a system with perfectly linear phase is discussed and shown that small perturbation of non-linear portion of the phase can fix the non-causal anomaly.

Analytical PDN voltage ripple calculation using simplified equivalent circuit model of PCB PDN

Printed circuit board (PCB) power distribution network (PDN) design performance depends on the peak voltage ripple caused by the integrated circuit (IC) switching currents. The input impedance seen by the IC looking into the PCB PDN can be calculated using a physics-based circuit model extracted from the cavity model approach. The input impedance is fitted to a simplified circuit model used to represent the PCB PDN. Using a switching current profile, the frequency domain noise voltage is found and transformed to the time domain ripple waveform which can then be used to evaluate the PDN design performance.

Quantification of Conductor Surface Roughness Profiles in Printed Circuit Boards

Conductor (copper) foil surface roughness in printed circuit boards (PCBs) is inevitable due to adhesion with laminate dielectrics. Surface roughness limits data rates and frequency range of application of copper interconnects and affects signal integrity (SI) in high-speed electronic designs. In measurements of dielectric properties of laminate dielectrics using traveling-wave techniques, conductor surface roughness may significantly affect accuracy of measuring dielectric constant (DK) and dissipation factor (DF), especially at frequencies above a few gigahertz, when copper roughness is comparable to skin depth of copper. This paper proposes an algorithm for characterization of copper foil surface roughness. This is done by analyzing the microsection images of copper foils obtained using optical or scanning electron microscopes. The statistics obtained from numerous copper foil roughness profiles allows for introducing a new metric for roughness characterization of PCB interconnects and developing “design curves,” which could be used by SI engineers in their designs.