Scott T. Sheppard

Characteristics of inversion-channel and buried-channel MOS devices in 6H-SiC

Inversion-channel and buried-channel gate-controlled diodes and MOSFETs are investigated in the wide bandgap semiconductor 6H-SiC. These devices are fabricated using thermal oxidation and ion implantation. The gate-controlled diodes allow room temperature measurement of surface states, which is difficult with MOS capacitors due to the 3 eV bandgap of 6H-SiC. An effective electron mobility of 20 cm/sup 2//Vs is measured for the inversion-channel devices and a bulk electron mobility of 180 cm/sup 2//Vs is found in the channel of the buried-channel MOSFET. The buried-channel transistor is the first ion-implanted channel device in SIC and the first buried-channel MOSFET in the 6H-SiC polytype. >

Nonequilibrium characteristics of the gate‐controlled diode in 6H‐SiC

N+‐P gate‐controlled diodes are fabricated in the wide band gap semiconductor 6H‐SiC by thermal oxidation and ion implantation of nitrogen. Room temperature capacitance‐voltage characteristics display a ‘‘hook and ledge’’ hysteresis, which has been observed in Si gate‐controlled diodes at 77 K. In these samples of p‐type doping 2.8×1016 cm−3, the surface state density is about 4×1012 cm−2.

THE EFFECT OF THERMAL PROCESSING ON POLYCRYSTALLINE SILICON/SIO2/6H-SIC METAL-OXIDE-SEMICONDUCTOR DEVICES

Thermal processing of polycrystalline silicon (polysilicon)/SiO2/SiC metal‐oxide‐semiconductor (MOS) devices following polysilicon deposition can have an adverse effect on the electrical properties of the SiO2/SiC interface. The primary effect is a negative shift in flatband voltage caused by an increase in fixed oxide charge and interface state density. These effects can be minimized or eliminated by restricting processing temperatures to 900 °C or below following polysilicon gate deposition.

Increased thermal generation rate in GaAs due to electron-beam metallization

Leakage currents due to thermal generation in a reverse‐biased p‐n junction can be accurately monitored by measuring the capacitance recovery transient of a p‐n‐p structure. Using this technique, it has been demonstrated that the thermal generation in the bulk depletion region of GaAs p‐n junctions grown by molecular beam epitaxy can be as much as three orders of magnitude greater for samples metallized in electron‐beam evaporators as compared to thermal evaporators. The increase in thermal generation rate is shown to be dependent upon the device area exposed during the evaporation, the type of metal initially evaporated onto the sample, the growth conditions during molecular beam epitaxy, and the depth of the p‐n junction from the semiconductor surface.

Experimental demonstration of a buried-channel charge-coupled device in 6H silicon carbide

Fundamental operation of the first buried-channel charge-coupled device (BCCD) in 6H-SiC is presented. The n-type buried-channel was formed by ion implantation of nitrogen, and a double level overlapping-polysilicon-gate process was adapted to the SiC MOS system. An electron mobility of 200 cm/sup 2//Vs was measured in the channel, which is doped 1.6/spl times/10/sup 17/ cm/sup -3/. An eight-stage, four-phase BCCD shift register was operated in the pseudo-two-phase configuration at room temperature. At 5.5 kHz, the charge transfer efficiency is greater than 99.4%.

Experimental characterization of electron-hole generation in silicon carbide

Thermal generation in wide bandgap semiconductors can be observed by monitoring the capacitance recovery transients of npn (or pnp) storage capacitors in which the middle layer is floating. In this article, we report a study of thermal generation in 4H and 6H silicon carbide (SiC). Three generation mechanisms are identified: bulk generation in the depletion regions of the pn junctions, surface generation at the periphery of the capacitors, and defect generation associated with imperfections in the material. All three generation mechanisms are thermally activated. Bulk generation and surface generation have activation energies of approximately half bandgap, while defect generation exhibits field-induced barrier lowering resulting in an apparent activation energy less than half bandgap. Because the generation rate is extremely low, most measurements are conducted at elevated temperatures (250-350°C). However, we also describe a long-term measurement at room temperature in which the 1/e recovery time appears to be in excess of 100 years.

High temperature performance of NMOS integrated inverters and ring oscillators in 6H-SiC

Electrical characterization up to 573 K is performed on integrated inverters with different beta ratios and 17-stage ring oscillators based on SiC NMOS technology. These devices are fabricated on a p-type 6H-SiC epitaxial layer with a doping concentration of N/sub A/=1/spl middot/10/sup 16/ cm/sup -3/. The n/sup +/ source/drain regions and buried channels for depletion-mode load transistors are achieved by ion implantation of nitrogen. Direct current measurements of the inverters with a 5 V power supply yield proper output levels and acceptable noise margins both at 303 and 573 K. Dynamic measurements with square waves show the full voltage swing up to 5 kHz in this temperature range. The 17-stage ring oscillators, driven by a 5.5 V power supply, show an oscillator frequency of 625 kHz at 303 K, which corresponds to a 47 ns delay per inverter stage. This time constant increases only to 59 ns at 573 K. The temperature drift of the measured output signal is well below 30% up to this elevated temperatures. During 20 heat cycles up to 573 K in air, no measurable drift in circuit parameters occurred. In addition, only a slight dependence of the oscillator frequency on supply voltage is observed.

Carrier transport related analysis of high-power AlGaN/GaN HEMT structures

Shubnikov-de Haas (SdH) oscillation and Hall measurement results were compared with HEMT DC and RF characteristics for two different MOCVD grown AlGaN-GaN HEMT structures on semiinsulating 4H-SiC substrates. A HEMT with a 40-nm, highly doped AlGaN cap layer exhibited an electron mobility of 1500 cm/sup 2//V/s and a sheet concentration of 9/spl times/10/sup 12/ cm at 300 K (7900 cm/sup 2//V/s and 8/spl times/10/sup 12/ cm/sup -2/ at 80 K), but showed a high threshold voltage and high DC output conductance. A 27-nm AlGaN cap with a thinner, lightly doped donor layer yielded similar Hall values, but lower threshold voltage and output conductance and demonstrated a high CW power density of 6.9 W/mm at 10 GHz. The 2DEG of this improved structure had a sheet concentration of n/sub SdH/=7.8/spl times/10/sup 12/ cm/sup -2/ and a high quantum scattering lifetime of /spl tau//sub q/=1.5/spl times/10/sup -13/ s at 4.2 K compared to n/sub SdH/=8.24/spl times/10/sup 12/ cm/sup -2/ and /spl tau//sub q/=1.72/spl times/10/sup -13/ s for the thick AlGaN cap layer structure, Despite the excellent characteristics of the films, the SdH oscillations still indicate a slight parallel conduction and a weak localization of electrons. These results indicate that good channel quality and high sheet carrier density are not the only HEMT attributes required for good transistor performance.

MOS characterization of thermally oxided 6H silicon carbide

Summary form only given. An MOS evaluation of the SIO/sub 2//SiC interface as a function of oxidation conditions and substrate doping is reported. 6H SiC (Si face) epitaxial wafers were thermally oxidized in both wet and dry ambients. MOS capacitors were formed by thermally evaporating circular aluminium field plates. Capacitance transient (C-t) measurements have been performed at elevated temperatures (260-370 degrees C). Approximate values for intrinsic carrier concentration n/sub i/ as a function of temperature in the range 270-360 degrees C have been obtained directly from the measured C-V curve. These n/sub i/ values are more than two orders of magnitude larger than would be calculated by extrapolating the accepted room temperature value. Based on these n/sub i/ values, bulk generation lifetime tau /sub G/ and surface generation velocity S/sub 0/ are calculated for an n-type sample using a modified Zerbst technique. Both tau /sub G/ and S/sub 0/ are within about a factor of 20 of the best reported silicon values. >