John W. Palmour

Critical evaluation of the status of the areas for future research regarding the wide band gap semiconductors diamond, gallium nitride and silicon carbide

Abstract The extreme thermal and electronic properties of diamond and of silicon carbide, and the direct band gap of gallium nitride, provide multiplicative combinations of attributes which lead to the highest figures of merit for any semiconductor materials for possible use in high power, high speed, high temperature and high frequency applications. The deposition of monocrystalline diamond, at or below 1 atm total pressure and at a temperature T , has been achieved on diamond substrates; the deposited film has been polycrystalline on all other substrates but the achievement is no less significant. For electronic applications, heteroepitaxy of single-crystal films of diamond, an understanding of mechanisms of nucleation and growth, methods of impurity introduction and activation, and further device development must be achieved. Stoichiometric gallium nitride free of nitrogen vacancies has apparently not been obtained. Thus, knowledge of the defect chemistry of this material, the growth of semiconducting films on foreign substrates, and the development of insulating layers and of their low temperature deposition as well as device fabrication procedures must be achieved. By contrast, all of these problems have already been solved for silicon carbide, including the operation of a MOSFET at 923 K — the highest operating temperature ever reported for a field-effect device. However, considerable research remains to be done regarding the development of large silicon carbide substrates, of ohmic and rectifying contacts, of new types of devices, and of low temperature techniques for the deposition of insulating layers. Fugitive donor and acceptor species in unintentionally doped samples must also be identified and controlled.

Characterization of device parameters in high‐temperature metal‐oxide‐semiconductor field‐effect transistors in β‐SiC thin films

Both inversion‐ and depletion‐mode n‐channel metal‐oxide‐semiconductor field‐effect transistors (MOSFETs) have been fabricated on β‐SiC thin films grown by chemical‐vapor deposition. The inversion‐mode devices were made on in situ doped (Al) p‐type β‐SiC(100) thin films grown on Si(100) substrates. The depletion‐mode MOSFETs were made on n‐type β‐SiC(111) thin films grown on the Si(0001) face of a 6H α‐SiC substrates. Stable saturation and low subthreshold currents were achieved at drain‐source voltages exceeding 5 and 25 V for the inversion‐mode and depletion‐mode devices, respectively. The transconductance increased with temperature up to 673 K for the short‐gate‐length devices, of either mode, and then decreased with further increases in temperature. It is proposed that the transconductances and threshold voltages for the inversion‐mode devices are greatly affected by minority‐carrier injection from the source. Stable transistor action was observed for both types of devices at temperatures up to 823 K,...

High‐temperature depletion‐mode metal‐oxide‐semiconductor field‐effect transistors in beta‐SiC thin films

Depletion‐mode n‐channel metal‐oxide‐semiconductor field‐effect transistors were fabricated on n‐type β‐SiCu2009(111) thin films epitaxially grown by chemical vapor deposition on the Siu2009(0001) face of 6H α‐SiC single crystals. The gate oxide was thermally grown on the SiC; the source and drain were doped n+ by N+ ion implantation at 823 K. Stable saturation and low subthreshold current were achieved at drain voltages exceeding 25 V. Transconductances as high as 11.9 mS/mm were achieved. Stable transistor action was observed at temperatures as high as 923 K, the highest temperature reported to date for a transistor in any material.

High Switching Performance of 1700-V, 50-A SiC Power MOSFET Over Si IGBT/BiMOSFET for Advanced Power Conversion Applications

Due to wider band gap of silicon carbide (SiC) compared to silicon (Si), MOSFET made in SiC has considerably lower drift region resistance, which is a significant resistive component in high-voltage power devices. With low on-state resistance and its inherently low switching loss, SiC MOSFETs can offer much improved efficiency and compact size for the converter compared to those using Si devices. In this paper, we report switching performance of a new 1700-V, 50-A SiC MOSFET designed and developed by Cree, Inc. Hard-switching losses of the SiC MOSFETs with different circuit parameters and operating conditions are measured and compared with the 1700-V Si BiMOSFET and 1700-V Si IGBT, using same test set-up. Based on switching and conduction losses, the operating boundary of output power and switching frequency of these devices are found out in a dc-dc boost converter and compared. The switching dv/dts and di/dts of SiC MOSFET are captured and discussed in the perspective of converter design. To validate the continuous operation, three dc-dc boost converters using these devices, are designed and tested at 10 kW of power with 1 kV of output voltage and 10 kHz of switching frequency. 1700V SiC Schottky diode is used as the blocking diode in each case. Corresponding converter efficiencies are evaluated and the junction temperature of each device is estimated. To demonstrate high switching frequency operation, the SiC MOSFET is switched upto 150 kHz within permissible junction temperature rise. A switch combination of the 1700-V SiC MOSFET and 1700-V SiC Schottky diode connected in series is also evaluated for zero voltage switching turn-ON behavior and compared with those of bipolar Si devices. Results show substantial power loss saving with the use of SiC MOSFET.

Temperature dependence of the current‐voltage characteristics of metal‐semiconductor field‐effect transistors in n‐type β‐SiC grown via chemical vapor deposition

Metal‐semiconductor field‐effect transistors (MESFET’s) have been fabricated in an unintentionally doped, n‐type β‐SiC thin film grown by chemical vapor deposition (CVD). This n‐type layer was deposited on a monocrystalline p‐type β‐SiCu2009(100) CVD layer previously grown on a p‐type Siu2009(100) substrate. The buried p layer allowed the devices to be fabricated several microns away from the SiC/Si interface region which contained numerous defects formed as a result of the poor lattice match and different coefficients of thermal expansion between SiC and Si. Thermally evaporated Au was utilized for the gate contact. Sputtered TaSi2 was employed for the source and drain contacts. The gate lengths and channel depths of these MESFET’s were 3.5 and 0.60 μm, respectively. Saturation of the drain currents was achieved at room temperature. Furthermore, the current‐voltage characteristics, measured from 298 to 623 K for the first time, indicated that these MESFET’s performed reasonably well throughout this temperature r...

Recent Progress in SiC Microwave MESFETs

SiC MESFETs have shown an RF power density of 4.6 W/mm at 3.5 GHz and a power added efficiency of 60% with 3 W/mm at 800 MHz, demonstrating that SiC devices are capable of very high power densities and high efficiencies. Single devices with 48 mm of gate periphery were mounted in a hybrid circuit and achieved a maximum RF power of 80 watts CW at 3.1 GHz with 38% PAE.

Monocrystalline beta -SiC semiconductor thin films: epitaxial growth, doping, and FET device development

High-purity, single-crystal beta -SiC thin films have been epitaxially grown by means of chemical vapor deposition. The defect nature of these films has been characterized, and antiphase boundaries, one of the major defects observed, were eliminated through utilization of off-axis Si-substrates. Doping of these films was possible through in-situ incorporation during growth or through ion implantation. The use of elevated temperatures during ion implantation resulted in damage-free material suitable for device fabrication. MESFETs constructed from these films showed good transistor action up to temperature of 523 K. Depletion-mode MOSFETs fabricated on beta -SiC

Development of Low RON,Diff, 12 kV, 4H-SiC GTOs For High-Power and High-Temperature Applications

In this paper, we report our recently developed 1 × 1 cm2, 12 kV SiC GTOs with a very low differential on-resistance (RON,Diff) of 4 mΩ·cm2 with respect to the device active area at high injection level current of 100 A/cm2 or higher, which is more than a 40% reduction from our previously reported work. This significant reduction in the on-resistance was attributed to an improvement of carrier lifetime in the SiC bulk region. The SiC GTO was wire-bonded and attached to a high-voltage package before the high-temperature measurement. Forward characteristics of the device were then measured using a Tektronics 371 curve tracer from room temperature up to 400°C. Over the temperature range, the RON,Diff of the 4H-SiC GTO increased modestly from 4 mΩ·cm2 at 20°C to 4.7 mΩ·cm2 at 400°C, while the forward voltage drop at 100 A decreased slightly from 3.97 V at 20°C to 3.6 V at 400°C. The gate to cathode blocking voltage (VGK) was measured using a customized high-voltage test set-up. The leakage current was measure...

Impact of carrier lifetime enhancement using high temperature oxidation on 15 kV 4H-SiC P-GTO thyristor

The impact of the lifetime enhancement process using high temperature thermal oxidation method on 4H-SiC P-GTOs was investigated. 15 kV 4H-SiC P-GTOs with 140 μm thick drift layers, with and without 1450°C lifetime enhancement oxidation (LEO) process, were compared. The LEO process increased the average carrier lifetime in p-type epi layer from 0.9 μs to 6.25 μs, and it was observed that the effectiveness of the lifetime enhancement process was very sensitive to the doping concentration. The device with the LEO process showed a significant reduction in forward voltage drop and a substantially lower holding current, as expected from the carrier lifetime measurements. However, a slight reduction in blocking capability was also observed from the devices treated with LEO process. The common emitter current gain (β) of the wide base test NPN BJT was approximately 10X higher for the wafer with LEO process.

Characterization of a Large Area Silicon Carbide PiN Diode at Temperatures up to 900°C

For the first time, a large area Silicon Carbide (SiC) PiN diode was measured to determine the forward and reverse characteristics at temperatures up to 900°C. The diode characterized had a chip area of 64 mm2 and used a conventional SiC PiN structure with a 75 um N type blocking layer thickness. A normal rating for this device at room temperature would be 50 amps at 100 A/cm2 and 6 kV. Since a package capable of operating at 900°C was not available, methods were developed to heat and verify the temperature of the diode die, provide electrical connections to the die and provide adequate insulation to minimize temperature gradients across the die. Even at this extreme temperature the diode maintained typical diode characteristics and maintained surprisingly good performance.