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IEEE Transactions on Magnetics | 1975

Diagnostic testing of a 10-kbit bubble memory chip

S. Orihara; Seiichi Iwasa; Teiji Majima; Kengo Nogiwa; Kazuo Yamagishi

A 10-kbit bubble memory chip has been designed and fabricated. Testing was accomplished using a new diagnostic test system, which can drive the bubble chip at two different speeds with bias fields switched synchronously with the bubble propagation. Bias margins of the fabricated chips were analyzed and it was confirmed that a sufficient bias-margin window could be assured in long-term operation.


Journal of Applied Physics | 1981

Design and characterization of a 1 megabit bubble memory device with relaxed function designs

T. Yanase; H. Inoue; Seiichi Iwasa; S. Orihara; S. Matsuyama

A low drive field 1 megabit bubble memory device has been developed with relaxed function designs and a planar process using a new type of Siloxane resin. The 1 megabit device uses a block replicate/swap organization based upon 1.9 μm diameter bubbles. The basic cell size is 7 μm×8 μm while the minimum feature size has a value of 1 μm. The chip size is 9.1 mm × 9.9 mm. Fabricated 1 megabit chips have been characterized over a drive field range of 45 to 65 Oe (peak field of 100 kHz triangular wave drive), and over a temperature range of 0 to 90°C. The results obtained in the characterization for the 1 megabit chips are good enough to guarantee the same drive field and sense requirements for packaged 1 megabit devices as those for 3 μm bubble 256 kbit devices.


IEEE Transactions on Magnetics | 1977

Margin degradation in the long-term testing of 3 µm bubble devices

S. Matsuyama; S. Orihara; Seiichi Iwasa; K. Yamagishi

Considerable degradation of the bias threshold ranging from 0.2 to 0.6 Oe/decade in its collapse side was found in the long-term testing of 3 μm bubble 80 kbit memory chips using (YEuYbCa) 3 (FeGe) 5 O 12 films. Investigating this problem in all its aspects, it was concluded that this margin degradation was caused by the fluctuation of the bias threshold, which closely corresponded to the fluctuation in the collapse field of bubbles statically trapped under the permalloy bars. To clarify the cause of this fluctuation, the permalloy film, the garnet film ion-implanted layer etc. were investigated, and it was found that this fluctuation depended on the garnet film thickness, the garnet film composition and on the arrangement of the surrounding permalloy patterns. The instability of the in-plane domains in the ion-implanted layers was proposed as a possible explanation of this fluctuation. Satisfactory results were obtained in long-term operation of the 80 kbit chips fabricated using the (YEuYbCa) 3 (FeGe) 5 O 12 and (YSmLuCa) 3 (FeGe) 5 O 12 films with the increased thickness of 3.4 to 3.6 μm, and it was found that the (YSmLuCa) 3 (FeGe) 5 O 12 films exhibited better characteristics compared to (YEuYbCa) 3 (FeGe) 5 O 12 films.


IEEE Transactions on Magnetics | 1980

Optimization of minor loop propagation for 8 µm period bubble memory devices

T. Yanase; H. Inoue; Seiichi Iwasa; S. Orihara

For 8 μm period bubble memory devices, minor loop propagation margins of asymmetric chevron and half disk patterns are compared under certain conditions using two kinds of garnet materials with 1.6 μm and 1.9 μm diameter bubbles. For the minor loop propagation with start-stop operation, the half disk pattern is superior to the asymmetric chevron pattern. In the 8 μm period circuit, the required drive fields for 1.9 μm diameter bubbles are remarkably reduced compared with those for 1.6 μm diameter bubbles. We found considerably large differences in propagation margins between both tracks of the minor loop. Such differences can be compensated by appropriately selecting the garnet film crystal orientation and direction of the DC in-plane magnetic field with respect to the minor loop propagation direction.


Journal of Applied Physics | 1979

Testing and defects of bubble memory devices

Seiichi Iwasa; S. Orihara; S. Matsuyama; Yoshiya Kaneko; Kengo Nogiwa

A computer‐controlled bubble memory wafer test system has been developed and more than 5,000 chips of 83 kbit and 300 kbit major‐minor loop design have been tested. Throughout the testing, various types of defects have been found, including defects sensitive to bubble population, start‐stop operation and in‐plane holding field. These defects are found to be caused by small defects in permalloy patterns or garnet films. An effective way to detect these defects has been developed.


Archive | 2003

Method and device for driving plasma display panel

Kenji Awamoto; Seiichi Iwasa


Archive | 1993

Folding portable data processing apparatus with three hinge points

Hideyuki Motoyama; Seiichi Iwasa; Isao Kawamura


Archive | 1997

Keyboard having plurality of keys therein, each key establishing different electric contacts

Hideyuki Motoyama; Seiichi Iwasa; Goro Watanabe


Archive | 1994

Key touch adjusting method and device

Seiichi Iwasa; Hideyuki Motoyama


Archive | 1992

Chair with a supplemental keyboard and a keyboard system

Hideyuki Motoyama; Seiichi Iwasa

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