S. Orihara

An 8 µm period bubble memory device with relaxed function designs

A new design concept for 8 μm period bubble memory devices is proposed. Pattern periods and sizes in function designs are increased, keeping the storage cell size 8 μm × 8 μm. This can relax spacial restrictions for the function pattern designs and is remarkably effective in maintaining low drive fields for the functions. Chip organizations which match this function design are discussed and a 256 kbit 8 μm period chip organized with block replicate gates and true swap gates has been designed. The characteristics obtained for the drive field, replicate phase margin, swap current margin, etc., are as good as those of 16 μm period 3 μm bubble devices. A chip organization of a 1 megabit device with a short access time is also proposed.

Diagnostic testing of a 10-kbit bubble memory chip

A 10-kbit bubble memory chip has been designed and fabricated. Testing was accomplished using a new diagnostic test system, which can drive the bubble chip at two different speeds with bias fields switched synchronously with the bubble propagation. Bias margins of the fabricated chips were analyzed and it was confirmed that a sufficient bias-margin window could be assured in long-term operation.

Design and characterization of a 1 megabit bubble memory device with relaxed function designs

A low drive field 1 megabit bubble memory device has been developed with relaxed function designs and a planar process using a new type of Siloxane resin. The 1 megabit device uses a block replicate/swap organization based upon 1.9 μm diameter bubbles. The basic cell size is 7 μm×8 μm while the minimum feature size has a value of 1 μm. The chip size is 9.1 mm × 9.9 mm. Fabricated 1 megabit chips have been characterized over a drive field range of 45 to 65 Oe (peak field of 100 kHz triangular wave drive), and over a temperature range of 0 to 90°C. The results obtained in the characterization for the 1 megabit chips are good enough to guarantee the same drive field and sense requirements for packaged 1 megabit devices as those for 3 μm bubble 256 kbit devices.

Stretcher design study for 1.5 μm bubble devices

Column period dependence of an asymmetrical chevron stretcher for 1.5 μm bubble devices has been studied under some film thickness conditions. The asymmetrical chevron stretchers with large column periods improve upper thresholds of bias margins although the 15 μm period degrades both upper and lower thresholds of the bias margins. A newly designed stretcher called Mt.Fuji has been developed, which has excellent stretching margin even at the period of 15 μm, typically 40 Oe bias margin at 55 Oe with a triangular wave drive. Nelson type detector for 1.5 μm bubble has been studied. Sensitivity of 0.25 % has been obtained.

Margin degradation in the long-term testing of 3 µm bubble devices

Considerable degradation of the bias threshold ranging from 0.2 to 0.6 Oe/decade in its collapse side was found in the long-term testing of 3 μm bubble 80 kbit memory chips using (YEuYbCa) 3 (FeGe) 5 O 12 films. Investigating this problem in all its aspects, it was concluded that this margin degradation was caused by the fluctuation of the bias threshold, which closely corresponded to the fluctuation in the collapse field of bubbles statically trapped under the permalloy bars. To clarify the cause of this fluctuation, the permalloy film, the garnet film ion-implanted layer etc. were investigated, and it was found that this fluctuation depended on the garnet film thickness, the garnet film composition and on the arrangement of the surrounding permalloy patterns. The instability of the in-plane domains in the ion-implanted layers was proposed as a possible explanation of this fluctuation. Satisfactory results were obtained in long-term operation of the 80 kbit chips fabricated using the (YEuYbCa) 3 (FeGe) 5 O 12 and (YSmLuCa) 3 (FeGe) 5 O 12 films with the increased thickness of 3.4 to 3.6 μm, and it was found that the (YSmLuCa) 3 (FeGe) 5 O 12 films exhibited better characteristics compared to (YEuYbCa) 3 (FeGe) 5 O 12 films.

Design of a 3 μm bubble 80‐kbit memory chip

A 3 μm bubble memory chip has been developed based on the established 6 μm bubble technology (1). As the saturation magnetization of 3 μm bubbles is nearly the same as that of 6 μm bubbles, propagation patterns are scaled down to 1/2 the size of those for 6 μm bubbles. However, the propagation of 3 μm bubbles in the H‐I pattern minor‐loops results in a remarkable increase in the minimum drive field, which is caused by anomalous bubble propagation. From the experimental study of the potential well depth under the H pattern, it is concluded that the anomalous propagation is caused by the magnetizing effect of bubbles on the patterns. This explanation can be justified by the fact that no anomalous propagation occurs when the H pattern is cut into two T patterns at its center.A 80‐kbit major‐minor memory chip was designed using broken H patterns. An overall operating margin of ∠8 Oe for a drive field of 40 Oe at 500 KHz was measured on a 282‐bit major‐minor loop chip with the same design.

Megabit bubble memory process using a new type resin and TaMo alloy‐Au conductor

A newly developed heat resistant resin, ladder type organosiloxane polymer, is applied to 8 μm period 1 megabit bubble memory devices. Propagation bias margin and reliability are discussed, comparing with the conventional SiO lift‐off planar process. TaMo alloy‐Au system is also introduced for the conductor. Interdiffusion, electromigration, and corrosion resistance of Au and refractory metals are studied.

Optimization of minor loop propagation for 8 µm period bubble memory devices

For 8 μm period bubble memory devices, minor loop propagation margins of asymmetric chevron and half disk patterns are compared under certain conditions using two kinds of garnet materials with 1.6 μm and 1.9 μm diameter bubbles. For the minor loop propagation with start-stop operation, the half disk pattern is superior to the asymmetric chevron pattern. In the 8 μm period circuit, the required drive fields for 1.9 μm diameter bubbles are remarkably reduced compared with those for 1.6 μm diameter bubbles. We found considerably large differences in propagation margins between both tracks of the minor loop. Such differences can be compensated by appropriately selecting the garnet film crystal orientation and direction of the DC in-plane magnetic field with respect to the minor loop propagation direction.

Testing and defects of bubble memory devices

A computer‐controlled bubble memory wafer test system has been developed and more than 5,000 chips of 83 kbit and 300 kbit major‐minor loop design have been tested. Throughout the testing, various types of defects have been found, including defects sensitive to bubble population, start‐stop operation and in‐plane holding field. These defects are found to be caused by small defects in permalloy patterns or garnet films. An effective way to detect these defects has been developed.

Fabrication of 3 µm Bubble 80 kbit Chips

A 3 µm bubble 80 kbit chip was designed by 1/2 scaling from the pattern for 6 µm bubble chip. To obtain a 1 µm minimum feature over a 5 mm square, projection printing was employed. By reducing the reflectance of the surface to be exposed below 33%, standing wave effects with monochromatic illumination could be minimized, and uniform 2 µm width and 1 µm gap pattern could be obtained, notwithstanding the variation in photoresist thickness and the unevenness of substrate. A standard deviation of this distribution in the pattern gap width in the fabricated 80 kbit chips was 0.067 µm when the flatness of the wafer is less than 0.5 µm/chip size. The effects of the variation in the pattern gap on the propagate margins could be ignored, if it fell in the range of 1.03 µm to 1.38 µm. Consequently, the resolution of 1±0.3 µm and uniform bias margin over 80 kbit chip area could be achieved with high yield.