Network
Latest external collaboration on country level. Dive into details by clicking on the dots.
Publication
Featured researches published by Seiichi Yoneda.
2014 IEEE COOL Chips XVII (COOL Chips) | 2014
Hikaru Tamura; Kiyoshi Kato; Takahiko Ishizu; Tatsuya Onuki; Wataru Uesugi; Takuro Ohmaru; Kazuaki Ohshima; Hidetomo Kobayashi; Seiichi Yoneda; Atsuo Isobe; Naoaki Tsutsui; Suguru Hondo; Yasutaka Suzuki; Yutaka Okazaki; Tomoaki Atsumi; Yutaka Shionoiri; Yukio Maehashi; Gensuke Goto; Masahiro Fujita; James Myers; Pekka Korpinen; Jun Koyama; Yoshitaka Yamamoto; Shunpei Yamazaki
A chip of embedded SRAM having backup circuits using a 60-nm c-axis aligned crystalline oxide semiconductor (CAAC-OS) such as CAAC indium-gallium-zinc oxide (CAAC-IGZO) and Cortex-M0 core having flip-flops with CAAC-OS backup circuits is fabricated. The SRAM and M0 core can retain data using the backup circuits during power-off; thus, they can perform power gating (PG) with backup time of 100 ns and recovery time of 10 clock cycles (including data restoration time (100 ns)). Further, memory cell area and performance in combining a 45-nm Si SRAM memory cell with 60-nm CAAC-OS are estimated to have negligible overhead.
Japanese Journal of Applied Physics | 2014
Kazuaki Ohshima; Hidetomo Kobayashi; Tatsuji Nishijima; Seiichi Yoneda; Hiroyuki Tomatsu; Shuhei Maeda; Kazuki Tsukida; Kei Takahashi; Takehisa Sato; Kazunori Watanabe; Ro Yamamoto; Munehiro Kozuma; Takeshi Aoki; Naoto Yamade; Yoshinori Ieda; Hidekazu Miyairi; Tomoaki Atsumi; Yutaka Shionoiri; Kiyoshi Kato; Yukio Maehashi; Jun Koyama; Shunpei Yamazaki
A low-power normally-off microcontroller unit (NMCU) having state-retention flip-flops (SRFFs) using a c-axis aligned crystalline oxide semiconductor (CAAC-OS) such as indium gallium zinc oxide (IGZO) transistors and employing a distributed backup and recovery method (distributed method) is fabricated. Compared to an NMCU employing a centralized backup and recovery method (centralized method), the NMCU employing the distributed method can be powered off approximately 75 µs earlier after main processing and can start the main processing approximately 75 µs earlier after power-on. The NMCU employing the distributed method can reduce power overhead by approximately 85% and power consumption by approximately 18% compared to the NMCU employing the centralized method. The NMCU employing the distributed method can retain data even when it is powered off, can back up data at high speed, and can start effective processing immediately after power-on. The NMCU could be applied to a low-power MCU.
international solid-state circuits conference | 2015
Takuro Ohmaru; Takashi Nakagawa; Shuhei Maeda; Yuki Okamoto; Munehiro Kozuma; Seiichi Yoneda; Hiroki Inoue; Yoshiyuki Kurokawa; Takayuki Ikeda; Yoshinori Ieda; Naoto Yamade; Hidekazu Miyairi; Makoto Ikeda; Shunpei Yamazaki
A vision sensor used to capture motion must operate with very low power when used in sensor networks where power is very limited. Frame-based [1] and event-driven [2,3] vision sensors have been reported. The former captures motion from the difference between captured data of a previous frame and that of a current frame; thus, it is difficult to capture motion of a slowly moving object. An event-driven sensor captures motion of a slowly moving object; however, its pixel configuration is complicated, and it is difficult to perform both motion capturing and image capturing. In this paper, we report a vision sensor for motion capturing having in-pixel non-volatile analog memory utilizing a c-axis aligned crystalline In-Ga-Zn oxide (CAAC-IGZO), a crystalline oxide semiconductor based FET that demonstrates very low off-state current [4] and retains captured data of a given reference frame. Although an electronic global shutter image sensor with improved floating diffusion (FD) charge retention characteristics is reported in [5], our vision sensor realizes normal global shutter and motion capturing depending on the presence or absence of differences with respect to a given reference frame in each pixel. The sensor has 3 modes: an imaging mode to output captured data in pixels, a motion-capturing mode to process differential data using an analog processor, and a standby mode to reduce power after motion capturing for each frame. Power consumption is reduced by operating only circuit blocks needed for each mode. The sensor (240×160 pixels), fabricated by a 0.5μm CAAC-IGZO FET/0.18μm p-channel Si FET (no n-channel Si FET) hybrid process shows power consumption of 25.3μW and 1.88μW at 60fps in the motion-capturing and standby modes, respectively, which equal 1/140th and 1/2000th of the power consumption of the imaging mode.
IEEE Journal of Solid-state Circuits | 2016
Takuro Ohmaru; Takashi Nakagawa; Shuhei Maeda; Yuki Okamoto; Munehiro Kozuma; Seiichi Yoneda; Hiroki Inoue; Yoshiyuki Kurokawa; Takayuki Ikeda; Yoshinori Ieda; Naoto Yamade; Hidekazu Miyairi; Makoto Ikeda; Shunpei Yamazaki
Utilizing a c-axis-aligned crystalline oxide semiconductor-based FET, we have fabricated a vision sensor with in-pixel nonvolatile analog memory. The sensor realized normal image data capturing, captured differential data of a given reference frame, and retained the captured data for an extended time in each pixel. Moreover, the sensor realized normal global shutter image capturing and motion capturing by extracting differential images. This is performed using the captured data and depends on the presence or absence of differences between normal images and reference images. The sensor has three operating modes: an imaging mode, a motion capturing mode, and a wait mode. Importantly, power consumption is reduced by powering off circuit blocks that are in a standby state.
ECS Transactions | 2017
Hitoshi Kunitake; Shintaro Harada; Fumika Akasawa; Yuki Okamoto; Takashi Nakagawa; Takeshi Aoki; Seiichi Yoneda; Hiroki Inoue; Munehiro Kozuma; Takayuki Ikeda; Yoshiyuki Kurokawa; Shunpei Yamazaki
Hitoshi Kunitake, Semiconductor Energy Laboratory Co., Ltd., Japan [email protected] Shintaro Harada, Semiconductor Energy Laboratory Co., Ltd., Japan Fumika Akasawa, Semiconductor Energy Laboratory Co., Ltd., Japan Yuki Okamoto, Semiconductor Energy Laboratory Co., Ltd., Japan Takashi Nakagawa, Semiconductor Energy Laboratory Co., Ltd., Japan Takeshi Aoki,Seiichi Yoneda, Semiconductor Energy Laboratory Co., Ltd., Japan Hiroki Inoue, Semiconductor Energy Laboratory Co., Ltd., Japan Munehiro Kozuma, Semiconductor Energy Laboratory Co., Ltd., Japan Takayuki Ikeda, Semiconductor Energy Laboratory Co., Ltd., Japan Yoshiyuki Kurokawa, Semiconductor Energy Laboratory Co., Ltd., Japan Shunpei Yamazaki, Semiconductor Energy Laboratory Co., Ltd., Japan
SID Symposium Digest of Technical Papers | 2012
Tatsuji Nishijima; Seiichi Yoneda; Takuro Ohmaru; Masami Endo; Hiroki Denbo; Masashi Fujita; Hidetomo Kobayashi; Kazuaki Ohshima; Yutaka Shionoiri; Kiyoshi Kato; Yukio Maehashi; Jun Koyama; Shunpei Yamazaki
Archive | 2014
Yukio Maehashi; Seiichi Yoneda; Wataru Uesugi
ITE Technical Report | 2015
Takuro Ohmaru; Takashi Nakagawa; Shuhei Maeda; Yuki Okamoto; Munehiro Kozuma; Seiichi Yoneda; Hiroki Inoue; Yoshiyuki Kurokawa; Takayuki Ikeda; Yoshinori Ieda; Naoto Yamade; Hidekazu Miyairi; Makoto Ikeda; Yoshitaka Yamamoto; Shunpei Yamazaki
Archive | 2016
Yuki Okamoto; Seiichi Yoneda; Yoshiyuki Kurokawa
Archive | 2015
Seiichi Yoneda; Yukio Maehashi