Selim Eminoglu

A low-cost uncooled infrared microbolometer detector in standard CMOS technology

This paper reports the development of a low-cost uncooled infrared microbolometer detector using a commercial 0.8 /spl mu/m CMOS process, where the CMOS n-well layer is used as the infrared sensitive material. The n-well is suspended by front-end bulk-micromachining of the fabricated CMOS dies using electrochemical etch-stop technique in TMAH. Since this approach does not require any lithography or infrared sensitive material deposition after CMOS fabrication, the detector cost is almost equal to the CMOS chip cost. The n-well has a TCR of 0.5-0.7%/K, relatively low compared to state-of-the-art microbolometer materials; however, it has negligible 1/f noise due to its single crystal structure. The use of polysilicon interconnects on the support arms instead of metal reduces the overall pixel TCR to 0.34%/K, but provides a better performance due to improved thermal isolation. Based on this pixel, a 16 /spl times/ 16 prototype focal plane array (FPA) with 80 /spl mu/m /spl times/ 80 /spl mu/m pixel size and 13% fill factor has been implemented, where built-in diodes are used to simplify array scanning, at the expense of reduced overall pixel TCR of 0.24%/K. The n-well microbolometer array with a simple readout scheme provides a responsivity of 2000 V/W, a detectivity of 2.6 /spl times/ 10/sup 8/ cmHz/sup 1/2//W, and an estimated NETD of 200 mK at 0.5 Hz frame rate. Considering that this performance can be further improved with low noise readout circuits, the CMOS n-well microbolometer is a cost-effective approach to implement very low-cost uncooled infrared detector arrays with reasonable performance.

A Low-Cost 128

This paper discusses the implementation of a low-cost 128 times 128 uncooled infrared microbolometer detector array together with its integrated readout circuit (ROC) using a standard 0.35 mum n-well CMOS and post-CMOS MEMS processes. The detector array can be created with simple bulk-micromachining processes after the CMOS fabrication, without the need for any complicated lithography or deposition steps. The array detectors are based on suspended p+-active/n-well diode microbolometers with a pixel size of 40 mum times 40 mum and a fill factor of 44%. The p+-active/n-well diode detector has a measured dc responsivity (R) of 4970 V/W and a thermal time constant of 36 ms at 50 mtorr vacuum level. The total measured rms noise of the diode type detector is 0.69 muV for an 8 kHz bandwidth, resulting in a detectivity (D*) of 9.7 times 108 cm ldr Hz1/2/W. The array is scanned by an integrated 32-channel parallel ROC including low-noise differential preamplifiers with an electrical bandwidth of 8 kHz. The 128 times 128 focal plane array (FPA) has one row of infrared-blind reference detectors that reduces the effect of FPA fixed pattern noise and variations in the operating temperature relaxing the requirements for the temperature stabilization. Including the noise of the reference and array detectors together with the ROC noise, the fabricated 128 times 128 FPA has an expected noise equivalent temperature difference (NETD) value of 1 K for f/1 optics at 30 frames/s (fps) scanning rate. This NETD value can be decreased to 350 mK by improving the post-CMOS fabrication steps and increasing the number of readout channels.

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This paper reports a low-cost, 256-pixel uncooled infrared microbolometer focal plane array (FPA) implemented using a 0.8 /spl mu/m CMOS process where the n-well layer is used as the active microbolometer material. The suspended n-well structure is obtained by simple front-end bulk etching of the fabricated CMOS dies, while the n-well region is protected from etching by electrochemical etch-stop technique within a TMAH solution. Electrical connections to the suspended n-well are obtained with polysilicon interconnect layer instead of aluminum to increase the thermal isolation of the pixel by an order of magnitude. Since polysilicon has very low TCR and high resistance, the effective TCR of the pixel is reduced to 0.34%/K, even though the n-well TCR is measured to be 0.58%/K. A 16/spl times/16 pixel array prototype with 80 /spl mu/m/spl times/80 /spl mu/m pixel sizes has successfully been implemented. The pixel resistance measurements show that pixels are very uniform with a nonuniformity of 1.23%. Measurements and calculations show that the detector and the array provide a responsivity of 1200 V/W, a detectivity of 2.2/spl times/10/sup 8/ cm/Hz/sup 1/2//W, and a noise equivalent temperature difference (NETD) of 200 mK at 0.5 Hz frame rate with fully serial readout scheme. This performance can be further increased by using other advanced readout techniques, therefore, the CMOS n-well microbolometer approach seems to be a very cost-effective method to produce large focal plane arrays for low-cost infrared imaging applications.

128 Uncooled Infrared Detector Array in CMOS Process

This paper reports implementation of a low-cost microbolometer focal plane array using n-well layer in a CMOS process as the microbolometer material. N-well microbolometer structures are suspended for thermal isolation by post-etching of fabricated CMOS dies using silicon bulk-micromachining techniques. Although n-well has a moderate TCR of 0.5-0.65%/K at 300K, it still provides a reasonable performance due to its single crystal structure which contributes low 1/f noise. Detailed thermal simulations in ANSYS were performed to obtain an optimized structure. Various prototype FPAs with 16x16 array sizes have been implemented with 80 mm x 80 mm and 50 mm x 50 mm pixel sizes. The measurements and calculations show that the n-well microbolometers can provide a responsivity of 8.5 x 106 V/W, a detectivity of 5.5 x 109 cmHz1/2/W, and an NETD of 260 mK at 30 frames per second using a simple, fully-serial readout approach with an integrator output. The performance of the array can be increased with advanced readout techniques and improved pixel structures. The CMOS n-well microbolometer approach seems very cost-effective to produce large focal plane arrays for uncooled infrared imaging with reasonable performance.

A low cost uncooled infrared microbolometer focal plane array using the CMOS n-well layer

This paper reports the development of a low-cost 128 x 128 uncooled infrared focal plane array (FPA) based on suspended and thermally isolated CMOS p+-active/n-well diodes. The FPA is fabricated using a standard 0.35 μm CMOS process followed by simple post-CMOS bulk micromachining that does not require any critical lithography or complicated deposition steps; and therefore, the cost of the uncooled FPA is almost equal to the cost of the CMOS chip. The post-CMOS fabrication steps include an RIE etching to reach the bulk silicon and an anisotropic silicon etching to obtain thermally isolated pixels. During the RIE etching, CMOS metal layers are used as masking layers, and therefore, narrow openings such as 2 μm can be defined between the support arms. This approach allows achieving small pixel size of 40 μm x 40 μm with a fill factor of 44%. The FPA is scanned at 30 fps by monolithically integrated multi-channel parallel readout circuitry which is composed of low-noise differential transconductance amplifiers, switched capacitor (SC) integrators, sample-and-hold circuits, and various other circuit blocks for reducing the effects of variations in detector voltage and operating temperature. The fabricated detector has a temperature coefficient of -2 mV/K, a thermal conductance value of 1.8 x 10-7 W/K, and a thermal time constant value of 36 msec, providing a measured DC responsivity (R) of 4970 V/W under continuous bias. Measured detector noise is 0.69 μV in 8 kHz bandwidth at 30 fps scanning rate, resulting a measured detectivity (D*) of 9.7 x 108 cm√HzW. Contribution of the 1/f noise component is found to be negligible due to the single crystal nature of the silicon n-well and its low value at low bias levels. The noise of the readout circuit is measured as 0.76 μV, resulting in an expected NETD value of 1 K when scanned at 30 fps using f=1 optics. This NETD value can be decreased below 350 mK by decreasing the electrical bandwidth with the help of increased number of parallel readout channels and by optimizing the post-CMOS etching steps. The uniformity of the array is very good due to the mature CMOS fabrication technology. The measured uncorrected differential voltage non-uniformity for the 128 x 128 array pixels after the CMOS fabrication is 0.2% with a standard deviation of only 1.5 mV, which is low due to the improved array structure that can compensate for the voltage drops along the routing resistances in the array. Non-uniformity of temperature sensitivity of the array pixels is measured to be less than 3% with a mean and standard deviation of -2.05 mV/K and 61 μV/K, respectively. The temperature sensitivity of the differential pixel voltages has a measured mean value of 2.3 μV/K, relaxing the requirements on the temperature stabilization. Considering its performance and its simple fabrication steps, the proposed method is very cost-effective to fabricate large format focal plane arrays for low-cost infrared imaging applications.

Uncooled microbolometer infrared focal plane array in standard CMOS

This paper reports the development of a low-cost CMOS microbolometer focal plane array with a new temperature coefficient enhancement readout circuit. We have recently reported an uncooled microbolometer detector that uses the CMOS n-well layer as the active material, where the suspended and thermally isolated n-well structure is obtained by silicon bulk micromachining of fabricated CMOS dies. In addition, we have successfully fabricated a 16 X 16 n-well microbolometer FPA. Although n-well is single crystal silicon and has very low 1/f noise, the fabricated array performance was limited due to low TCR of the n-well. The n-well has a TCR of 0.50 - 0.70%/K, which is the highest among the CMOS layers, but lower compared to the state-of-the-art microbolometer materials whose TCR values are about 2 - 3%/K. This paper reports a new n-well microbolometer FPA with a readout circuit that enhances the temperature coefficient (TC) of the microbolometer current, compensating for the low TCR value of the detector. The TC enhancement is achieved by passing the pixel current through a 4th power taking circuit prior to integration, increasing the pixel current TC four times and resulting in an effective TC of 2.0 - 2.8%/K. A 16 X 16 test array has been designed and fabricated using a 0.8 micrometers standard CMOS process. The chip measures 2.4 X 3.8 mm2 and contains 80 micrometers X 80 micrometers microbolometer pixels with 13% fill factor. The measurements and calculations show that the 16 X 16 prototype FPA can provide a responsivity (R) of 2 X 107 V/W, a detectivity (D*) of 1.68 X 109 cm(root)Hz/W, and NETD of 290 mK at a scanning rate of 260 fps. The same NETD value can be obtained for a 128 X 128 pixel array operating at 30 fps. NETD can further be decreased by improving the noise performance of the readout circuit, since the performance is not limited by the n-well microbolometer noise.

Low-cost uncooled infrared detector arrays in standard CMOS

This paper reports the development of a new microbolometer readout integrated circuit (MT3250BA) designed for high-resistance detector arrays. MT3250BA is the first microbolometer readout integrated circuit (ROIC) product from Mikro-Tasarim Ltd., which is a fabless IC design house specialized in the development of monolithic CMOS imaging sensors and ROICs for hybrid photonic imaging sensors and microbolometers. MT3250BA has a format of 320 × 256 and a pixel pitch of 50 µm, developed with a system-on-chip architecture in mind, where all the timing and biasing for this ROIC are generated on-chip without requiring any external inputs. MT3250BA is a highly configurable ROIC, where many of its features can be programmed through a 3-wire serial interface allowing on-the-fly configuration of many ROIC features. MT3250BA has 2 analog video outputs and 1 analog reference output for pseudo-differential operation, and the ROIC can be programmed to operate in the 1 or 2-output modes. A unique feature of MT3250BA is that it performs snapshot readout operation; therefore, the image quality will only be limited by the thermal time constant of the detector pixels, but not by the scanning speed of the ROIC, as commonly found in the conventional microbolometer ROICs performing line-by-line (rolling-line) readout operation. The signal integration is performed at the pixel level in parallel for the whole array, and signal integration time can be programmed from 0.1 µs up to 100 ms in steps of 0.1 µs. The ROIC is designed to work with high-resistance detector arrays with pixel resistance values higher than 250 kΩ. The detector bias voltage can be programmed on-chip over a 2 V range with a resolution of 1 mV. The ROIC has a measured input referred noise of 260 µV rms at 300 K. The ROIC can be used to build a microbolometer infrared sensor with an NETD value below 100 mK using a microbolometer detector array fabrication technology with a high detector resistance value (≥ 250 KΩ), a high TCR value (≥ 2.5 % / K), and a sufficiently low pixel thermal conductance (Gth ≤ 20 nW / K). The ROIC uses a single 3.3 V supply voltage and dissipates less than 75 mW in the 1-output mode at 60 fps. MT3250BA is fabricated using a mixed-signal CMOS process on 200 mm CMOS wafers, and tested wafers are available with test data and wafer map. A USB based compact test electronics and software are available for quick evaluation of this new microbolometer ROIC.

CMOS n-well microbolometer FPA with temperature coefficient enhancement circuitry

This paper presents a fully-integrated lab-on-a-chip (LOC) system for label-free detection and real-time counting of dielectrophoretically trapped multidrug resistant (MDR) K562 cells. The system integrates a parylene-based microfluidic DEP channel on top of a CMOS image sensor for the first time in the literature. The DEP channel can trap MDR K562 cells with 9 Vpp and 10 μl/min flow rate, and the CMOS image sensor can detect the trapped cells as small as 3 μm in diameter with a noise level of 28.3 e-rms.

MT3250BA: a 320×256-50µm snapshot microbolometer ROIC for high-resistance detector arrays

This paper reports the development of a new miniature VGA SWIR camera called NanoCAM-6415, which is developed to demonstrate the key features of the MT6415CA ROIC such as high integration level, low-noise, and low-power in a small volume. The NanoCAM-6415 uses an InGaAs Focal Plane Array (FPA) with a format of 640 × 512 and pixel pitch of 15 μm built using MT6415CA ROIC. MT6415CA is a low-noise CTIA ROIC, which has a system-on-chip architecture, allows generation of all the required timing and biases on-chip in the ROIC without requiring any external components or inputs, thus enabling the development of compact and low-noise SWIR cameras, with reduced size, weight, and power (SWaP). NanoCAM-6415 camera supports snapshot operation using Integrate-Then-Read (ITR) and Integrate-While-Read (IWR) modes. The camera has three gain settings enabled by the ROIC through programmable Full-Well-Capacity (FWC) values of 10.000 e-, 20.000 e-, and 350.000 e- in the very high gain (VHG), high-gain (HG), and low-gain (LG) modes, respectively. The camera has an input referred noise level of 10 e- rms in the VHG mode at 1 ms integration time, suitable for low-noise SWIR imaging applications. In order to reduce the size and power of the camera, only 2 outputs out of 8 of the ROIC are connected to the external Analog-to-Digital Converters (ADCs) in the camera electronics, providing a maximum frame rate of 50 fps through a 26-pin SDR type Camera Link connector. NanoCAM-6415 SWIR camera without the optics measures 32 mm × 32 mm × 35 mm, weighs 45gr, and dissipates less than 1.8 W using a 5 V supply. These results show that MT6415CA ROIC can successfully be used to develop cameras for SWIR imaging applications where SWaP is a concern. Mikro-Tasarim has also developed new imaging software to demonstrate the functionality of this miniature VGA camera. Mikro-Tasarim provides tested ROIC wafers and also offers compact and easy-to-use test electronics, demo cameras, and hardware/software development kits for its ROIC customers to shorten their FPA and camera development cycles.

Label-free detection of leukemia cells with a lab-on-a-chip system integrating dielectrophoresis and cmos imaging

This paper reports the development of a new microbolometer Readout Integrated Circuit (ROIC) called MT3825BA. It has a format of 384 × 288 and a pixel pitch of 25μm. MT3825BA is Mikro-Tasarim’s second microbolometer ROIC product, which is developed specifically for resistive surface micro-machined microbolometer detector arrays using high-TCR pixel materials, such as VOx and a-Si. MT3825BA has a system-on-chip architecture, where all the timing, biasing, and pixel non-uniformity correction (NUC) operations in the ROIC are applied using on-chip circuitry simplifying the use and system integration of this ROIC. The ROIC is designed to support pixel resistance values ranging from 30 KΩ to 100 KΩ. MT3825BA is operated using conventional row based readout method, where pixels in the array are read out in a row-by-row basis, where the applied bias for each pixel in a given row is updated at the beginning of each line period according to the applied line based NUC data. The NUC data is applied continuously in a row-by-row basis using the serial programming interface, which is also used to program user configurable features of the ROIC, such as readout gain, integration time, and number of analog video outputs. MT3825BA has a total of 4 analog video outputs and 2 analog reference outputs, placed at the top and bottom of the ROIC, which can be programmed to operate in the 1, 2, and 4-output modes, supporting frames rates well above 60 fps at a 3 MHz pixel output rate. The pixels in the array are read out with respect to reference pixels implemented above and below actual array pixels. The bias voltage of the pixels can be programmed over a 1.0 V range to compensate for the changes in the detector resistance values due to the variations coming from the manufacturing process or changes in the operating temperature. The ROIC has an on-chip integrated temperature sensor with a sensitivity of better than 5 mV / K, and the output of the temperature sensor can be read out the output as part of the analog video stream. MT3825BA can be used to build a microbolometer FPAs with an NETD value below 100 mK using a microbolometer detector array fabrication technology with a detector resistance value up to 100 KΩ, a high TCR value (< 2 % / K), and a sufficiently low pixel thermal conductance (Gth ≤ 20 nW / K). MT3825BA measures 13.0 mm × 13.5 mm and is fabricated on 200 mm CMOS wafers. The microbolometer ROIC wafers are engineered to have flat surface finish to simplify the wafer level detector fabrication and wafer level vacuum packaging (WLVP). The ROIC runs on 3.3 V analog and 1.8 V digital supplies, and dissipates less than 85 mW in the 2-output mode at 30 fps. Mikro-Tasarim provides tested ROIC wafers and offers compact test electronics and software for its ROIC customers to shorten their FPA and camera development cycles.