Seon-tae Kim

Fast mode decision algorithm for spatial and SNR scalable video coding

Scalable video coding (SVC) has found more and more applications in a variety of the adaptive network streaming and the terminal. In the current SVC, an exhaustive search technique is employed to select the best coding mode for each macro block. This technique achieves the optimal trade-off between the bit-rate and distortion, but it results in extremely large encoding time which obstructs it from practical use. In this paper, we propose a fast mode decision algorithm for inter frame coding for spatial and coarse grain signal to noise ratio (SNR) scalability. In the proposed method, we predict the enhancement layer mode using both collocated macro block and its neighboring block mode in the base layer. The proposed method can achieve the time saving up to 78 percent in spatial scalability and 35 percent in coarse grain quality scalability (CGS) with the negligible loss of quality and increment in bit rate.

Novel Block Motion Estimation Based on Adaptive Search Patterns

An improved algorithm for fast motion estimation based on the block matching algorithm (BMA) is presented for use in a block-based video coding system. To achieve enhanced motion estimation performance, we propose an adaptive search pattern length for each iteration for the current macro block (MB). In addition, search points that must be checked are determined by means of directional information from the error surface, thus reducing intermediate searches. The proposed algorithm is tested with several sequences and excellent performance is verified.

A Fast Intra-Mode Decision Algorithm for P-Slices in H.264/AVC Video Coding

H.264/AVC video coding has significantly improved video compression performance compared to other video coding schemes by using a variable block size and a rate-distortion optimization (RDO) technique for each macro-block. As a result, the complexity and computational load have been significantly increased, causing many difficulties for use in real-time applications. A fast intra-mode decision algorithm is proposed for reduction video compression complexity that uses an inter-mode block type for fast intra-prediction. The inter-best mode block type and the direction of the texture edge or object boundary are highly correlated at the inter-mode decision. Based on inter-best mode information, only a small number of intra-prediction modes are used. Experimental results show that this scheme can significantly improve the speed of the intra-mode search procedure with a negligible loss in the peak signal to noise ratio (PSNR) and a minimal bit rate increase.

Design of large scale network simulator using device emulator for Internet of Things

The term “Internet of Things” (IoT) denotes the interconnected of embedded devices designed to leverage data gathered by sensors. These devices are interconnected to transmit information and control instruction via the internet infrastructure. The development of an IoT system is a complex process due to the large scale and widely distribution of deployed wireless node. The simulator provides infrastructure to easily test and debug the algorithms of the IoT applications before they are to be deployed in actual environment. In this paper, we propose the emulation based network simulator architecture which focus on the large scale IoT system. With the proposed simulator architecture, the IoT application developers can reduce cost by cutting the amount of nodes needed for application test and shortens development time required for deploying a large scale IoT system.

An industrial IoT MAC protocol based on IEEE 802.15.4e TSCH for a large-scale network

IEEE 802.15.4e TSCH MAC is widely used for the industrial market, which require ultra-high reliability and ultra-low power. However, the significance of the TSCH is missing, which is a management function to build and maintain the communication schedule. We address several limitations for Ipv6 over IEEE 802.15.4e TSCH in a large-scale network and propose an enhanced scheme which deals with the configuration of Slotframes, Linkset slots, EB(Enhanced Beacon) management and scheduling information. It supports a dynamic schedule management based on observed resource usage, which achieves industrial-grade performance in terms of jitter, latency, scalability, reliability and low-power consumption.

Multi-Level Ultra Low-Power Mode Support Mechanisms for Wearable Device

For the convenience of users, thousands of wearable devices with new built-in applications are appearing every year in the field of healthcare, sports, and safety. However, the system of them should be operated by using limited capacity of power because of very small size of battery that can be loaded into a wearable device due to the device properties. For such a reason, Chip Vendors are recently launching MCUs with ultra-low power capability on the market and also MCU that supports 7-step low power mode was appeared at present[1-3]. But now, it is very rare case to completely use Low Power Mode offered by MCU vendor on the operating system (OS) that is applied to wearable devices, and there is no case to support low power mode by the OS at the board level. Therefore, this paper suggests optimal supporting mechanism for ultra-low power multi-step mode at the OS level of wearable device. The mechanism proposed in this paper is largely divided into two parts. First, it is Low Power Mode Governor (LPMG) which is a module used to select an optimal low power mode after computation of retention time in idle mode. Second, we proposed Power-Off Mode, which disconnects power to the board when idle mode lasts for a long time. When integrating these two technologies and applying them to the Tickless nanoQplus[4], the OS for wearable devices developed at our lab, in the same Wearable Application Scenario 2 test, power consumption after passing a certain duration of time is reduced by 98.05% compared to idle mode, and 96.33% compared to sleep mode. These newly proposed two technologies will be able to offer an effective solution required to achieve low power consumption in wearable devices.

MAC-Aware Concentrated Multi-Point Relay Selection Algorithm in Ad Hoc Networks

In OLSR, only selected Multipoint Relays (MPRs) are allowed to forward broadcast data during the flooding process, which reduces the message transmission overhead. Since every node in a network selects its own MPRs independently, many nodes may be MPRs of other nodes, which results in many collisions in the Medium Access Control (MAC) layer especially in the high traffic load condition. In this paper, we propose the concentrated MPR selection mechanism in an ad hoc network. Our proposed MPR selection can reduce the number of MPRs and thus the number of MAC layer collisions. The performance of the proposed MPR selection mechanism is investigated via analysis and simulations. The performance evaluation indicates that the proposed MPR selection is efficient.

Service-oriented networking platform on smart devices

This study presents the design of a service-oriented networking platform to offer dynamic networking services in support of mobile group communications among connected smart devices. This platform enables users to access smart services anywhere and anytime with embedded devices while satisfying their requirements of various smart services. The proposed platform adopts a session initiation protocol (SIP) protocol as service signalling protocol that provides high extensibility and compatibility with an existing service system. The overlay network structure suggested in our platform provides an advantage of building a scalable and dynamic service network based on multiple smart zones. Furthermore, the quality of end-to-end service in dynamic network environments is guaranteed by virtue of the smart delivery scheme in the platform.

Poster: Click based IP border router for low-power and lossy networks

The IETFs new protocols for Low-power and Lossy Networks are delegating their several functions to an IP border router that has more resources than other constrained nodes in the network. It makes the complexity of the IP border router higher than other conventional routers. For this reason, a well-designed platform for routers is important for fast development and easy debugging. In this paper, we check the feasibility of Click Modular Router platform to develop the IP border router for LLNs. Then, we present a design and an implementation of the IP border router on top of Click.

Molecular beam epitaxy growth of InP-based lattice-matched high electron mobility transistor structures having a modified quantum-well profile due to AlxGayIn1 − x − yAs(x + y = 0.47−8) buffer layer

Abstract The quaternary compound, Al x Ga y In 1 − x − y As ( x + y = 0.47−8) lattice-matched to InP substrates was realized as a buffer layer in an InP-based lattice-matched high electron mobility transistors. The band gap energy of this quaternary compound buffer layer was linearly decreased from E g = 1.54 eV for Al 0.48 Ga y =0 In 0.52 As to E g = 0.82 eV for Al x =0 Ga 0.47 In 0.53 As by varying Al and Ga mole fraction simultaneously. A self-consistent analysis revealed, one, that this buffer layer modified the quantum-well structure into a triangular-shaped conduction-band profile and, two, the disappearance of the quantum-well in valance-band profile. By forming a triangular-shaped conduction-band quantumwell, carrier wave functions drifted farther apart from the heterointerface, leading to the reduction of ionized impurity scattering. Disappearance of holes in a valance band also contributed to the reduction of the hole and electron recombination scattering. A high electron mobility of 11 338 cm 2 /V s with two-dimensional electron gas density of 2.5 × 10 12 /cm 2 was achieved at room temperature. The high electron mobility was believed to have resulted from the modified triangular-shape quantum well in which the ionized impurity ion scattering was suppressed. We believe that we have achieved the highest room temperature value of electron mobility time with two-dimensional electron gas concentration that was 2.83 × 10 16 /cm 2 to date for InP-based lattice-matched high electron mobility transistors system. PL measurement showed some evidences of a high-quality epitaxial growth.