Seong Ho Cho

Defect Control in Zinc Oxynitride Semiconductor for High-Performance and High-Stability Thin-Film Transistors

The fabrication of thin-film transistor devices incorporating active semiconductors based on zinc oxynitride (ZnON) compound is presented. It is demonstrated that the addition of appropriate dopant, gallium, in ZnON, suppresses the formation of shallow donor, nitrogen vacancies, and significantly improves electrical characteristics of the resulting TFT. The Ga:ZnON devices with field-effect mobility values exceeding 50 cm2/Vs are achieved, which makes them suitable as switching or driving elements in next-generation flat-panel displays.

Influences of Charged Dislocations on Performance of III-V Compound Semiconductor FinFETs

We present a model for charged dislocations effects on III-V compound semiconductor based FinFETs performance. The model is developed to obtain momentum relaxation time and, from it, key device performance parameters such as effective mobility, threshold voltage, and finally saturation drain current. We find out that charged threading edge dislocation density of a FinFET channel should be smaller than about 107 cm-2 to ignore the dislocation scattering impact on the device performance which is roughly one order more strict condition than previously known condition for wurtzite GaN.

An equivalent circuit model for a Ge Waveguide Photodetector on Si

We present an equivalent circuit model with improved accuracy for 1.5-μm germanium waveguide-type vertical photodetectors on a silicon-on-insulator substrate. Our model consists of passive circuit components, two current sources for photogenerated carrier transports, and one noise current source. Model parameters are extracted from electrical S-parameter measurements, TCAD simulations of photodetection frequency responses, and noise measurements. The resulting equivalent circuit model accurately provides photodetection frequency responses at different bias voltages and should be of great use for high-performance optical receiver circuit design.