Sethu Saveda Suvanam

Passivation of SiC device surfaces by aluminum oxide

A steady improvement in material quality and process technology has made electronic silicon carbide devices commercially available. Both rectifying and switched devices can today be purchased from several vendors. This successful SiC development over the last 25 years can also be utilized for other types of devices, such as light emitting and photovoltaic devices, however, there are still critical problems related to material properties and reliability that need to be addressed. This contribution will focus on surface passivation of SiC devices. This issue is of utmost importance for further development of SiC MOSFETs, which so far has been limited by reliability and low charge carrier surface mobilities. Also bipolar devices, such as BJTs, LEDs, or PV devices will benefit from more efficient and reliable surface passivation techniques in order to maintain long charge carrier lifetimes. Silicon carbide material enables the devices to operate at higher electric fields, higher temperatures and in more radiation dense applications than silicon devices. To be able to utilize the full potential of the SiC material, it is therefore necessary to develop passivation layers that can sustain these more demanding operation conditions. In this presentation it will also be shown that passivation layers of Al2O3 deposited by atomic layer deposition have shown superior radiation hardness properties compared to traditional SiO2-based passivation layers.

Stoichiometry of the ALD-Al2O3/4H-SiC interface by synchrotron-based XPS

The interface of Al2O3 with 4H-SiC is investigated with synchrotron-based high-resolution x-ray photoelectron spectroscopy to clarify the effect of post-dielectric deposition annealing processes (r ...

Effects of 3 MeV protons on 4H-SiC bipolar devices and integrated OR-NOR gates

Radiation effects of 3-MeV protons on 4H-SiC bipolar devices and integrated OR-NOR gates have been investigated. The chips were irradiated from a fluence of 1× 10⁸ cm^-2 until 1 × 10¹³ cm^-2. Up until a fluence of 1 × 10¹¹ cm^-2, both the bipolar devices and the logic gates were found to be stable, but for higher fluence, they begin to degrade as a function of irradiation fluence. Using TCAD simulations, degradation of the transistor current gain has been found to be more dominated by surface states than bulk defects generated by the proton irradiation. Simulations of logic circuits using SPICE show that the gain degradation is the key contribution to the unstable performance of the circuits from the fluence of 1 × 10¹² cm^-2 and above.

4H-silicon carbide-dielectric interface recombination analysis using free carrier absorption

In this paper, an alternative method to characterize the interface between 4H polytype of Silicon Carbide (4H-SiC) and passivating dielectric layers is established. The studies are made on dielectr ...

High Gamma Ray Tolerance for 4H-SiC Bipolar Circuits

A high gamma radiation hardness of 4H-SiC circuits is performed. The OR NOR circuits are based on emitter coupled logic (ECL), using integrated bipolar NPN transistors. Gain degradation in individual bipolar junction transistors (BJT) is minimal up to a dose of 38 Mrad (SiO2), but for the dose of 332 Mrad (SiO2) a degradation of 52% is observed. The SiC BJTs show higher radiation hardness than existing Si-technology and high stability under temperature stress. It is proposed that the oxide charge-dominated recombination is the key base current recombination mechanism contributing to gain degradation. An improvement in the gain is seen after annealing at 400 °C for 1800 s due to the possible annealing of some of the oxide defects contributing to the oxide charge.

Interface analysis of p-type 4H-SiC/Al2O3 using synchrotron-based XPS

In this paper, the interface between Al2O3 and p-type 4H-SiC is evaluated using x-ray photoelectron spectroscopy (XPS) measurements. These studies are made on dielectric-semiconductor test structures with Al2O3 as dielectric with different pre-and post-deposition treatments. XPS measurements on the as-deposited samples with two different pre-surface cleaning have shown no formation of a SiO2 interlayer. However, after the post deposition rapid thermal annealing (RTA) at 1100 °C in N2O for 60s, a SiO2 interlayer is formed. The surface band bending was determined from Si 2p core level peak shifts measured using XPS. These results suggest that Al2O3 deposited on the p-type 4H-SiC have a net positive oxide charge which is complementary to that of n-type 4H-SiC. From these shifts it was found that the as-deposited RCA cleaned sample had an oxide charge of 5.6×1013 q/cm-2, as compared to standard cleaned samples, having 4.6×1013 q/cm-2. A further reduction in oxide charge was observed after annealing at 1100 °C in N2O, down to a value of 4×1013 q/cm-2.

Influence of Swift Heavy Ion Irradiation on the Photoluminescence of Si-nanoparticles and Defects in SiO2

The influence of swift heavy ion (SHI) irradiation on the photoluminescence (PL) of silicon nanoparticles (SiNPs) and defects in SiO2-film is investigated. SiNPs were formed by implantation of 70 keV Si+ and subsequent thermal annealing to produce optically active SiNPs and to remove implantation-induced defects. Seven different ion species with energy between 3-36 MeV and fluence from 1011-1014 cm-2 were employed for irradiation of the implanted samples prior to the thermal annealing. Induced changes in defect and SiNP PL were characterized and correlated with the specific energy loss of the employed SHIs. We find that SHI irradiation, performed before the thermal annealing process, affects both defect and SiNP PL. The change of defect and SiNP PL due to SHI irradiation is found to show a threshold-like behaviour with respect to the electronic stopping power, where a decrease in defect PL and an anticorrelated increase in SiNP PL after the subsequent thermal annealing are observed for electronic stopping exceeding 3-5 keV nm-1. PL intensities are also compared as a function of total energy deposition and nuclear energy loss. The observed effects can be explained by ion track formation as well as a different type of annealing mechanisms active for SHI irradiation compared to the thermal annealing.

Characterization of LaxHfyO Gate Dielectrics in 4H-SiC MOS Capacitor

LaxHfyO nanolaminated thin film deposited using atomic layer deposition process has been studied as a high-K gate dielectric in 4H-SiC MOS capacitors. The electrical and nano-laminated film characteristics were studied with increasing post deposition annealing (PDA) in N2O ambient. The result shows that high quality LaxHfyO nano-laminated thin films with good interface and bulk qualities are fabricated using high PDA temperature.

Tailoring the Interface between Dielectric and 4H-SiC by Ion Implantation

In this paper effects of carbon (C), silicon (Si) and nitrogen (N) implantation on the interface properties of 4H-SiC/SiO2 and the implications for 4H-SiC bipolar junction transistors (BJT) passivation are discussed. 4H-SiC epi-layer have been implanted with 12C, 14N and 28Si ion at three different doses with energies of 3, 3.5 and 6 keV, respectively, resulting in a projected range of 8 nm for the three ions. Then metal oxide semiconductor (MOS) structures with SiO2 as dielectric have been fabricated. Capacitance voltage measurements show an increase in the negative fixed charges for all the implanted samples as a function of implantation induced damage. Similarly, in the case of C and Si, the surface roughness increases as a function of dose and the mass of the ions. No reduction of Dits due to the implantations is seen for any of the ions. Furthermore, TCAD device simulations of npn bipolar junction transistors (BJT), using the interface and fixed charges extracted from CV measurements, show a way to further optimize current gain and breakdown properties for the BJT.

A Comparison of Free Carrier Absorption and Capacitance Voltage Methods for Interface Trap Measurements

This paper aims to establish a new method to characterize the interface between 4H-SiC and passivating dielectric layers. The investigations are made on MOS test structures utilizing Al2O3 and SiO2 dielectrics on 4H-SiC. These devices are then exposed to various fluences of Ar+ implantation and then measured by the new method utilizing optical free carrier absorption (FCA) technique to assess the interface traps. A program has been developed using MATLAB to extract surface recombination velocity (SRV) at the oxide/epi-layer interface from the optical data. Capacitance-voltage (CV) is done to extract the density of interface traps (Dit) and a comparison was made. It is observed that SiO2 samples show a large rise of SRVs, from 0.5×104 cm/s for a reference sample to 8×104 cm/s for a fluence of 1×1012 cm-2, whereas Al2O3 samples show more stable SRV, changing from 3×104 cm/s for the un-irradiated reference sample to 6×104 cm/s for a fluence of 1×1012 cm-2. A very similar trend is observed for Dit values extracted from CV measurements and it can therefore be concluded that the FCA method is a suitable technique for the interface characterization.