Seung-Jun Chee

Control of Three-Phase Inverter for AC Motor Drive With Small DC-Link Capacitor Fed by Single-Phase AC Source

If a small dc-link capacitor is used in the dc link fed by a single-phase ac source, then the dc-link voltage severely fluctuates at twice of the source frequency. To handle this fluctuation, the concept of “average voltage constraint” is proposed in this study. On the basis of this concept, a flux-weakening scheme, generating the d-axis current reference (idsr*) for the interior permanent-magnet synchronous machine, is devised. The q-axis current reference (iqsr*) is modified for the unity power factor operation in the viewpoint of an ac source without an additional sensor. The proposed scheme has been applied to the inverter-driven 1-kW compressor of an air conditioner. From the experimental results, it has been verified that the compressor operates well at the required operating condition, regardless of the severe fluctuation of dc-link voltage, because of the reduced dc-link capacitance. The frequency spectrum of the ac source current reveals that the harmonics of the source current meet the regulation of IEC 61000-3-2 Class A and that the overall power factor is above 96% without any additional circuit, such as an input filter and a power factor correction circuit.

Suppression of Circulating Current in parallel operation of three-level converters

The Zero Sequence Circulating Current (ZSCC) flows inevitably in parallel converters sharing common DC and AC sources. The currents flowing commonly in all converters increase losses and decrease the overall capacity of parallel converters. This paper proposes a simple and effective ZSCC suppression method based on the Space Vector PWM (SVPWM) method with the ZSCC controller. The zero sequence voltage for the proposed SVPWM is calculated based not on the phase voltage references, but on the grid voltage. The limit of linear modulation index of the converters with the proposed method is analyzed compared to other methods, and it is proven that the limit of linear modulation index can be maximized with the proposed method. The effectiveness of the proposed method has been verified through the experimental set-up consisted of the four parallel three-level converters. It has been confirmed that the ZSCC is well suppressed and larger linear modulation index is achieved at the same time with the proposed method. Moreover, the proposed control method does not require any communication between converters to suppress the ZSCC unlike the conventional methods.

Dead-time compensation based on pole voltage measurement

This paper presents a simple dead-time compensation method for a three phase PWM inverter based on the measured pole voltage using enhanced capture (eCAP) module usually embedded in a digital signal processor (DSP). The information of the inverter pole voltages can be employed to compensate the voltage difference between commanded voltage and actual output voltage of the PWM inverter. Because the method does not rely on any other information except for the measured switching instants of each phase of the inverter, it can be easily accommodated into the low cost drive system where accurate and instantaneous measurement of the phase current is not available. The difference can be added at the next sampling time of the switching period of the PWM and could be updated after one sampling period due to the digital sampling delay. These total two sampling periods delay would degrade the performance of the dead-time compensation. To enhance the performance, a PI regulator is employed to nullify the difference in controlled manner. The effectiveness of the proposed compensation methods has been verified through the experimental results. Through the proposed compensation method, the 5th and 7th harmonic currents are reduced by 85% and 70%, respectively.

Analysis and compensation of inverter nonlinearity for three-level T-type inverters

This paper analyzes the inverter nonlinearity effect resulting in issues such as narrow pulses and the even order harmonics in three-level T-type inverters. These issues make the compensation of the inverter nonlinearity be difficult. Based on the analysis of the output voltage distortion, carrier-based PWM methods to avoid these issues and to balance dc-link voltages simultaneously are proposed using the concept of the offset voltage. The proposed PWM methods can be easily implemented by adding appropriate offset voltages to output voltage references. Also, a compensation method to alleviate inverter nonlinearity effects is proposed based on the modeling of the inverter nonlinearity. The effectiveness of proposed methods is verified by experimental results. Through the proposed algorithms, not only even harmonics but also 5th and 7th harmonic components of current are conspicuously reduced. At the same time, the neutral voltage of the inverter can be balanced effectively by the proposed PWM methods.

A bilateral reactive power injection method for islanding detection of grid-connected converters in distributed generation units

In this paper, a bilateral reactive power injection method is proposed for islanding detection of grid-connected converters in distributed generation units. The proposed method injects capacitive and inductive reactive power periodically with half of the grid frequency to perturb the frequency of point of common coupling (PCC). The magnitude of the injected reactive power is derived in order to remove the non-detection zone and the frequency of the injected reactive power is determined by considering parallel operation of the converters with no communication. In addition, the distortion of the currents by the proposed detection method is analyzed. The effectiveness of the proposed method is experimentally verified through the operation of two converters used for a 10kW battery energy storage system.

Loss comparison of the 3 level topologies for four-leg voltage converters

This paper is to compare the loss of the each 3 level topologies for four-leg voltage converters. In case of the power conditioning system connected to the grid without a transformer, 4 leg topology is essential to cover the unbalanced three phase loads. Using simulations with real loss data table of the power switches, loss analysis of the each 3 level topology with 4 legs according to the different PWM methods is carried out at the normal state and at the stand-alone operation with various kinds of load conditions. From the simulation and experimental results, it is shown that T-type with the MLPWM is the most efficient combination regardless of whether the loads are balanced or not.

Common-mode Voltage Reduction of Three Level Four Leg PWM Converter

This paper presents a carrier-based pulsewidth modulation (PWM) method that reduces the common-mode voltage (CMV) of a three-level four-leg converter. Based on an analysis of space vector PWM (SVPWM) and sinusoidal-PWM switching patterns, the fourth-leg pole voltage of a three-phase converter, known as the “f pole voltage,” is manipulated to reduce the CMV. To synthesize the f pole voltage for the suppression of the CMV, positive and negative pole voltage references of the f leg are calculated. In addition, the offset voltage to prevent distortion of the a, b, and c phase voltages regarding the neutral point is deduced. The proposed PWM strategy can be easily implemented in the software of a DSP-based converter control. The three-level four-leg converter with the proposed PWM algorithm results in a remarkable reduction in the peak-to-peak value of the CMV. From the simulation and the experimental results, the peak-to-peak value of the CMV when using the proposed PWM method is 33% compared to that when using the SVPWM method, while the number of CMV transitions during the switching period in the proposed PWM method is only 25% of that when using the SVPWM method.

Analysis on current flowing through deactivated modules in parallel connected AC/DC converters

In this paper, the problem with the “unexpected current” flowing in parallel connected AC/DC converter system was discussed. The above mentioned “unexpected current” is the current that flows through the diodes of the turned-off converters where some converters are operating but others are not. Since this extra current degrades the efficiency of converters and distorts the grid current, it should be minimized. The phenomenon about the current which flows through the diodes of the turned-off converters was analyzed, and several ways to minimize this current have been reviewed and their effects were verified by simulation and experimental results.

Seamless transfer strategy considering power balance in parallel operation

This paper presents a power reference modifier for seamless transfer considering the power balance in the parallel operation. When the PCS (Power Conditioning System) is disconnected from the grid, the PCS should operate in the stand-alone mode to supply energy to the critical loads. If multiple PCSs work as one PCS, slave PCSs maintain the current control mode even if master PCS change its control mode from the current control to the voltage control. If the power references of slave PCSs are not changed properly based on the load condition, the power balance condition may not be met. In that case, the voltage applied to the critical loads might be beyond or below the rated voltage. To avoid this phenomenon, the power values absorbed into the loads should be monitored consistently and the power references of the slave PCSs should be modified properly based on them. But the master PCS which transfers the power references to the slave PCSs and works as voltage source in stand-alone mode can obtain it indirectly by calculating its own power values without monitoring the power consumed by critical loads. Using those, simple controller for modifying the power references of the slave PCSs can be configured. The effectiveness of the proposed power reference modifier has been verified through the experimental results. By applying the proposed method, the transition from the grid-connected mode to the stand-alone mode works satisfying Computer Business Equipment Manufacturers Association (CBEMA) curve.

Suppression of Circulating Current in Parallel Operation of Three-Level AC/DC Converters

Zero-sequence Circulating Current (ZSCC) flows inevitably in parallel converters that share common DC and AC sources. The ZSCC commonly flowing in all converters increases loss and decreases the overall capacity of parallel converters. This paper proposes a simple and effective ZSCC suppression method based on the Space Vector PWM (SVPWM) with the ZSCC controller. The zero-sequence voltage for the proposed SVPWM is calculated on the basis of the grid voltage and not on the phase voltage references. The limit of the linear modulation region of the converters with the proposed method is analyzed and compared with other methods, thereby proving that the limit of the region can be extended with the proposed method. The effectiveness of the proposed method has been verified through the experimental setup comprising four parallel three-level converters. The ZSCC is confirmed to be well suppressed, and the linear modulation region is extended simultaneously with the proposed method. Moreover, the proposed control method does not require any communication between the converters to suppress the ZSCC unlike other conventional methods.