Seungjae Baek

Refresh Now and Then

DRAM stores information in electric charge. Because DRAM cells lose stored charge over time due to leakage, they have to be “refreshed” in a periodic manner to retain the stored information. This refresh activity is a source of increased energy consumption as the DRAM density grows. It also incurs nontrivial performance loss due to the unavailability of memory arrays during refresh. This paper first presents a comprehensive measurement-based characterization study of the cell-level data retention behavior of modern low-power DRAM chips. About 99.7% of the cells could retain the stored information for longer than 1 s at a high temperature. This average cell retention behavior strongly indicates that we can deeply reduce the energy and performance penalty of DRAM refreshing with proper system support. The second part of this paper, accordingly, develops two practical techniques to reduce the frequency of DRAM refresh operations by excluding a few leaky memory cells from use and by skipping refreshing of unused DRAM regions. We have implemented the proposed techniques completely in the Linux OS for experimentation, and measured performance improvement of up to 17.2% with the refresh operation reduction of 93.8% on smartphone like low-power platforms.

Uniformity improving page allocation for flash memory file systems

Flash memory is a storage medium that is becoming more and more popular. Though not yet fully embraced in traditional computing systems, Flash memory is prevalent in embedded systems, materialized as commodity appliances such as the digital camera and the MP3 player that we enjoy in our everyday lives. This paper considers an issue in file systems that use Flash memory as a storage medium and makes the following two contributions. First, we identify the cost of block cleaning as the key performance bottleneck for Flash memory analogous to the seek time in disk storage. We derive and define three performance parameters, namely, utilization, invalidity, and uniformity, from characteristics of Flash memory and present a formula for block cleaning cost based on these parameters. We show that, of these parameters, uniformity most strongly influences the cost of cleaning and that uniformity is a file system controllable parameter. This leads us to our second contribution, designing the modification-aware (MODA) page allocation scheme and analyzing how enhanced uniformity affects the block cleaning cost with various workloads. Real implementation experiments conducted on an embedded system show that the MODA scheme typically improves 20 to 30% in cleaning time compared to the traditional sequential allocation scheme that is used in YAFFS.

Design and Analysis of a Space Conscious Nonvolatile-RAM File System

Nonvolatile memory technology is evolving continuously and commercial products such as FeRAM and PRAM are now appearing in the market. As Nonvolatile-RAM (NVRAM) has properties of both memory and storage, it can store persistent data objects while allowing fast and random access. To utilize NVRAM for general purpose storing of frequently updated data across power disruptions, some essential features of the file system including naming, recovery, and space management are required while exploiting memory-like properties of NVRAM. Conventional file systems, including even recently developed NVRAM file systems, show very low space efficiency wasting more than 50% of the total space in some cases. To efficiently utilize the relatively expensive NVRAM, we design and analyze a new extent-based file system, which we call NEBFS (NVRAM Extent-Based File System). We analyze and compare the space utilization of conventional file systems with NEBFS

LTFTL: lightweight time-shift flash translation layer for flash memory based embedded storage

Flash memory storage has been widely used in various embedded systems such as digital cameras, MP3 players, cellular phones, and DMB devices and now it applies to PCs as a form of SSDs. Characteristics of Flash memory necessitate a software layer called FTL (Flash Translation Layer) that directs modified data to new places in Flash memory and maintains a mapping between a logical sector number to a physical page. We notice that this out-of-place update scheme of the FTL allows a low-overhead time-shifting between multiple versions of storage state. From this observation, we propose LTFTL (Lightweight Time-shift FTL) that provides not only multiple versions of storage state but also an open-ended interface to traverse them. This open-ended interface can be used to support fault-resilience schemes, transactions of various granularities, and user-friendly roll-back services. Experimental results from a prototype implementation show that the proposed LTFTL can (1) provide a low-overhead time-shift capability at the user level by maintaining multiple storage states and (2) enhance the reliability/survivability of Flash memory by allowing to roll back to a previous consistent storage state at the storage system level.

Energy-efficient and high-performance software architecture for storage class memory

Recently, interest in incorporating Storage Class Memory (SCM), which blurs the distinction between memory and storage, into mainstream computing has been increasing rapidly. In this paper, we address the emerging questions regarding the use of SCM. Based on an embedded platform that employs FeRAM, a type of SCM, we present our findings. In summary, by introducing SCM, power efficiency improves while performance is degraded. We also show that such performance degradations may be removed with operating system level schemes that fully exploit the characteristics of SCM. Finally, we present permanent computing that supports lightweight system on/off capabilities by using SCM.

Amnesic cache management for non-volatile memory

One characteristic of non-volatile memory (NVM) is that, even though it supports non-volatility, its retention capability is limited. To handle this issue, previous studies have focused on refreshing or advanced error correction code (ECC). In this paper, we take a different approach that makes use of the limited retention capability to our advantage. Specifically, we employ NVM as a file cache and devise a new scheme called amnesic cache management (ACM). The scheme is motivated by our observation that most data in a cache are evicted within a short time period after they have been entered into the cache, implying that they can be written with the relaxed retention capability. This retention relaxation can enhance the overall cache performance in terms of latency and energy since the data retention capability is proportional to the write latency. In addition, to prevent the retention relaxation from degrading the hit ratio, we estimate the future reference intervals based on the inter-reference gap (IRG) model and manage data adaptively. Experimental results with real-world workloads show that our scheme can reduce write latency by up to 40% (30% on average) and save energy consumption by up to 49% (37% on average) compared with the conventional LRU based cache management scheme.

Design and implementation of a kernel resource protector for robustness of Linux module programming

Loadable kernel modules supported by Linux provides lots of benefits such as a small-sized kernel, on-demand loading, and easy software upgrading. However, since modules are executed in a privileged mode, trivial misuses in a module may cause critical system halts or deadlock situations. This paper presents a kernel resource protector which prevents kernel from faults generated by modules. The protector models the system in two objects: module object and resource object. By observing the interrelations between the two objects, the protector can detect misuses of modules and take actions to resolve the erroneous situations. Implementation study has shown that the protector can find out memory leaks wasted by modules and can reclaim leaks without degrading system performance. The proposed protector makes Linux more robust, which is required indispensably in the system equipped with NVRAM (Non Volatile RAM) such as FRAM and PRAM.

Model and validation of block cleaning cost for flash memory

Flash memory is a storage medium that is becoming more and more popular. Though not yet fully embraced in traditional computing systems, Flash memory is prevalent in embedded systems, materialized as commodity appliances such as the digital camera and the MP3 player that we are enjoying in our everyday lives. The cost of block cleaning is an important factor that strongly influences Flash memory file system performance analogous to the seek time in disk storage based systems. We show that three performance parameters, namely, utilization, invalidity, and uniformity characteristics of Flash memory strongly effect this block cleaning cost and present a model for the block cleaning cost based on these parameters. We validate this model using synthetic workloads on commercial Flash memory products.

Design and implementation of a uniformity-improving page allocation scheme for flash-based storage systems

Flash memory is being actively employed in a variety of embedded systems such as digital cameras, MP3 players, cell phones, solid state disks (SSDs), and digital media broadcasting (DMB) devices. This paper considers performance issues in file systems that employ Flash memory as a storage medium. Firstly, it explores the characteristics of Flash memory and identifies the cost of block cleaning as the key performance bottleneck for Flash memory analogous to the seek time in disk storage. Then, it defines three performance parameters, namely, utilization, invalidity, and uniformity and derives a formula for block cleaning cost based on these parameters. It is shown that, of these parameters, uniformity exerts the strongest influence on the cost of cleaning and that uniformity is a file system controllable parameter. Finally, we design a uniformity-aware page allocation scheme and analyze how enhanced uniformity affects the block cleaning cost with various workloads. Real implementation experiments conducted on an embedded system show that the scheme proposed here typically reduces the cleaning time by 20 to 30% compared to the traditional sequential allocation scheme that is used in YAFFS.

Performance Characteristics of Flash Memory: Model and Implications

In this paper, we propose a model to identify the cost of block cleaning of Flash memory. The model defines three performance parameters, namely, utilization, invalidity, and uniformity and presents a formula for estimating the block cleaning cost based on these parameters. Then, we design a new modification-aware (MODA) page allocation scheme which can improve the block cleaning cost by enhancing uniformity of Flash memory. Real implementation experiments conducted on an embedded system show that the MODA scheme can reduce block cleaning time by up to 43 seconds (with an average of 10.2 seconds) compared to the traditional sequential allocation scheme that is used in YAFFS.