Seungwook Paek

Homogeneous Stream Processors With Embedded Special Function Units for High-Utilization Programmable Shaders

We embed special function units (SFUs) in homogeneous stream processors (SPs) within a graphics processing unit (GPU), to improve its performance in running modern programmable shaders, which make poor use of a single-instruction multiple-data (SIMD) architecture. We also compact instructions, so as to reduce the size of the instruction memory, and reduce area requirements by using a partial SFU in SPs, and a lookup table which is shared between multiple SFUs. The result is an increase of 88% in utilization and a reduction in the normalized area-delay product of 27%, compared to a baseline SIMD architecture. We verified our architecture on an field-programmable gate-array evaluation platform with an ARM9 host processor and a full 3-D graphics pipeline.

All-digital hybrid temperature sensor network for dense thermal monitoring

Technology scaling and many-core design trends demand detailed information regarding the spatial temperature distribution, which is essential for dynamic thermal management [1,2]. The number of on-chip temperature sensors in high-performance processors is increasing, with state-of-the-art commercial processors embedding up to 44 on-chip sensors [3] and the number is likely to increase in the future (Fig. 14.7.1(a)). We observe two significant challenges in on-chip temperature sensing: 1) the increasing number of sensors, and 2) placing them in a regular manner (not solely on the potential hotspots). The number of sensors is mostly constrained by their area. Indeed, the sensor area is difficult to shrink since large delay lines or a BJT with a large ADC, and digital circuits are required to generate a proportional-to-absolute-temperature (PTAT) signal [2,5,6]. Many-core processor architectures give rise to the second challenge, namely, the hotspot locations within many-core processors are difficult to predict since we cannot determine the task allocation (and heat) profile at design time [2]. Consequently, an area-efficient dense thermal monitoring technique is desirable for next-generation processors.

Hybrid Temperature Sensor Network for Area-Efficient On-Chip Thermal Map Sensing

Spatial thermal distribution of a chip is an essential information for dynamic thermal management. To get a rich thermal map, the sensor area is required to be reduced radically. However, squeezing the sensor size is about to face its physical limitation. In this background, we propose an area-efficient thermal sensing technique: hybrid temperature sensor network. The proposed sensor architecture fully exploits the spatial low-pass filtering effect of thermal systems, which implies that most of the thermal information resides in very low spatial frequency region. Our on-chip sensor network consists of a small number of accurate thermal sensors and a large number of tiny relative thermal sensors, responsible for low and high spatial frequency thermal information respectively. By combining these sensor readouts, a thermal map upsampler synthesizes a higher spatial resolution thermal map with a proposed guided upsampling algorithm.

Area-efficient dynamic thermal management unit using MDLL with shared DLL scheme for many-core processors

An area-efficient dynamic thermal management (DTM) unit using multiplying delay-locked loop (MDLL) with shared DLL scheme is proposed for per-core DTM in many-core processors. The proposed DTM unit consists of a MDLL and a shared-DLL-based temperature sensor. The shared DLL takes part in both temperature sensing and frequency scaling while reducing the size of whole DTM unit. The area is reduced by 54.4% compared to the design in which a phase-locked loop (PLL) is used without any optimization scheme.

PowerField: A Probabilistic Approach for Temperature-to-Power Conversion Based on Markov Random Field Theory

Temperature-to-power technique is useful for post-silicon power model validation. However, the previous works were applicable only to the steady-state analysis. In this paper, we propose a new temperature-to-power technique, named PowerField, supporting both transient and steady-state analysis based on a probabilistic approach. Unlike the previous works, PowerField uses two consecutive thermal images to find the most feasible power distribution that causes the change between the two input images. To obtain the power map with the highest probability, we adopted maximum a posteriori Markov random field (MAP-MRF). For MAP-MRF framework, we modeled the spatial thermal system as a set of thermal nodes and derived an approximated transient heat transfer equation that requires only the local information of each thermal node. Experimental results with a thermal simulator show that PowerField outperforms the previous method in transient analysis reducing the error by half on average. We also show that our framework works well for steady-state analysis by using two identical steady-state thermal maps as inputs. Lastly, an application to determining the binary power patterns of an FPGA device is presented achieving 90.7% average accuracy.

Live demonstration: A real-time compensated inductive transceiver for wearable MP3 player system on multi-layered planar fashionable circuit board

A wearable MP3 player system on a multi-layered common fabric patch is proposed for an unobtrusive usage in daily life. An inductive coupling transceiver is proposed as a wearable wireless connector, and it reduces power consumption below to 185.6μW in total. Also it compensates for the dynamic variation caused by users activities within 3.96μs in worst case. The complete system is implemented on a 2-layer fabric substrate, and the music playback process is fully demonstrated.

A real-time compensated inductive transceiver for wearable MP3 player system on multi-layered planar fashionable circuit board

A wearable MP3 player system on a multi-layered common fabric patch is proposed for an unobtrusive usage in daily life. An inductive coupling transceiver is proposed as a wearable wireless connector in order to eliminate the physical attachment and detachment of the memory card so that enhance the system reliability. It adopts the Pulsed Clock On-Off Keying (PC-OOK) modulation to reduce power consumption below to 185.6μW in total. And Real-time Capacitor Compensation (RCC) scheme compensates for the dynamic variation caused by users activities within 3.96μs in worst case. The complete system is implemented on a 2-layer fabric substrate, and the music playback process is fully demonstrated.

PRISM: a system for weighted multi-color browsing of fashion products

Multiple color search technology helps users find fashion products in a more intuitive manner. Although fashion product images can be represented not only by a set of dominant colors but also by the relative ratio of colors, current online fashion shopping malls often provide rather simple color filters. In this demo, we present PRISM (Perceptual Representation of Image SiMilarity), a weighted multi-color browsing system for fashion products retrieval. Our system combines widely accepted backend web service stacks and various computer vision techniques including a product area parsing and a compact yet effective multi-color description. Finally, we demonstrate the benefits of PRISM system via web service in which users freely browse fashion products.

Timing error masking by exploiting operand value locality in SIMD architecture

A significant amount of energy is consumed by a voltage guardband to ensure error-free operations under the worsening PVT variations in modern processors. Circuit-level timing speculation has become a popular approach that increases energy efficiency by removing such guardband and tolerating occasional timing errors. However, SIMD processors suffer from a large throughput and energy efficiency loss induced by a conventional error correction mechanism which requires several extra cycles for each timing error. In this paper, we present an error masking scheme to eliminate the chances of performing the error correction. The error masking is done by allowing potential erroneous addition instructions to reuse the partial result of previous operations. We show that reuse can be applied to a large number of addition instructions by exploiting the observations that SIMD applications exhibit high levels of temporal operand value locality and operand value locality across SIMD lanes. Our implementation of the proposed masking scheme is augmented with the conventional pipeline logics. Simulation results verify that our scheme achieves up to 5.1% improvement in energy efficiency and 30% improvement in EDP (Energy-Delay-Product) over the baseline design.

PowerField: a transient temperature-to-power technique based on Markov random field theory

Transient temperature-to-power conversion is as important as steady-state analysis since power distributions tend to change dynamically. In this work, we propose PowerField framework to find the most probable power distribution from consecutive thermal images. Since the transient analysis is vulnerable to spatio-temporal thermal noise, we adopted a maximum-a-posteriori Markov random field framework to enhance the noise immunity. The most probable power map is obtained by minimizing the energy function which is calculated using an approximated transient thermal equation. Experimental results with a thermal simulator shows that PowerField outperforms the previous method in transient analysis reducing the error by half on average. We also applied our method to a real silicon achieving 90.7% accuracy.