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Dive into the research topics where Shahin Farshchi is active.

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Featured researches published by Shahin Farshchi.


international conference on embedded networked sensor systems | 2006

Capturing high-frequency phenomena using a bandwidth-limited sensor network

Ben Greenstein; Christopher Mar; Alex Pesterev; Shahin Farshchi; Eddie Kohler; Jack W. Judy; Deborah Estrin

Small-form-factor, low-power wireless sensors-motes-are convenient to deploy, but lack the bandwidth to capture and transmit raw high-frequency data, such as human voices or neural signals, in real time. Local filtering can help, but we show that the right filter settings depend on changing ambient conditions and network effects such as congestion, which makes them dynamic and unpredictable. Mote collection systems for high-frequency data must support iteratively-tuned, deployment-specific filter settings as well as fast samplin.VANGO, our software system for high-frequency data collection, achieves these goals via integrated processing across network tiers. Bandwidth-limited sensor nodes reduce data in network but rely on microservers, which have greater computational capabilities and a wider scope of observation, to plan how. VANGO provides a cross-platform library for data transformation, measurement, and classification; a fast and low-jitter data acquisition system for motes; and a mechanism to control mote and microserver signal processing. With VANGO we have developed new applications: the first acoustic collection system for motes responsive to changing environmental conditions and user interests, and the first neural spike acquisition application capable of supporting a network of nodes.


IEEE Transactions on Biomedical Engineering | 2006

A TinyOS-enabled MICA2-BasedWireless neural interface

Shahin Farshchi; Paul Nuyujukian; Aleksey Pesterev; Istvan Mody; Jack W. Judy

Existing approaches used to develop compact low-power multichannel wireless neural recording systems range from creating custom-integrated circuits to assembling commercial-off-the-shelf (COTS) PC-based components. Custom-integrated-circuit designs yield extremely compact and low-power devices at the expense of high development and upgrade costs and turn-around times, while assembling COTS-PC-technology yields high performance at the expense of large system size and increased power consumption. To achieve a balance between implementing an ultra-compact custom-fabricated neural transceiver and assembling COTS-PC-technology, an overlay of a neural interface upon the TinyOS-based MICA2 platform is described. The system amplifies, digitally encodes, and transmits neural signals real-time at a rate of 9.6 kbps, while consuming less than 66 mW of power. The neural signals are received and forwarded to a client PC over a serial connection. This data rate can be divided for recording on up to 6 channels, with a resolution of 8 bits/sample. This work demonstrates the strengths and limitations of the TinyOS-based sensor technology as a foundation for chronic remote biological monitoring applications and, thus, provides an opportunity to create a system that can leverage from the frequent networking and communications advancements being made by the global TinyOS-development community.


international conference of the ieee engineering in medicine and biology society | 2007

Bi-Fi: An Embedded Sensor/System Architecture for Remote Biological Monitoring

Shahin Farshchi; Aleksey Pesterev; Paul Nuyujukian; Istvan Mody; Jack W. Judy

Wireless-enabled processor modules intended for communicating low-frequency phenomena (i.e., temperature, humidity, and ambient light) have been enabled to acquire and transmit multiple biological signals in real time, which has been achieved by using computationally efficient data acquisition, filtering, and compression algorithms, and interfacing the modules with biological interface hardware. The sensor modules can acquire and transmit raw biological signals at a rate of 32 kb/s, which is near the hardware limit of the modules. Furthermore, onboard signal processing enables one channel, sampled at a rate of 4000 samples/s at 12-bit resolution, to be compressed via adaptive differential-pulse-code modulation (ADPCM) and transmitted in real time. In addition, the sensors can be configured to filter and transmit individual time-referenced ldquospikerdquo waveforms, or to transmit the spike height and width for alleviating network traffic and increasing battery life. The system is capable of acquiring eight channels of analog signals as well as data via an asynchronous serial connection. A back-end server archives the biological data received via networked gateway sensors, and hosts them to a client application that enables users to browse recorded data. The system also acquires, filters, and transmits oxygen saturation and pulse rate via a commercial-off-the-shelf interface board. The system architecture can be configured for performing real-time nonobtrusive biological monitoring of humans or rodents. This paper demonstrates that low-power, computational, and bandwidth-constrained wireless-enabled platforms can indeed be leveraged for wireless biosignal monitoring.


international ieee/embs conference on neural engineering | 2005

A TinyOS-Based Wireless Neural Sensing, Archiving, and Hosting System

Shahin Farshchi; Paul Nuyujukian; Aleksey Pesterev; Istvan Mody; Jack W. Judy

We have designed and tested a comprehensive wireless neural recording system. The system amplifies, digitally encodes, transmits, archives, hosts, and displays multiple channels of neural recordings from any number of un-tethered test subjects. The neural transmitter and receiver are modified TinyOS-based MICAz wireless sensor nodes that can sample, transmit, and receive neural data real-time at a rate of 44.8 kbps while consuming less than 100 mW of power. This data rate can be divided for recording on up to eight channels, with a resolution of up to 10 bits per sample. An archive server records the neural signals received by the Ethernet-based gateway receivers, and hosts them to browser-based clients over the Internet. This work demonstrates the viability of the TinyOS-based sensor technology as a foundation for chronic remote biological monitoring applications, and demonstrated a system architecture that can actively leverage advancements in distributed sensing, networking, and communications technologies


international ieee/embs conference on neural engineering | 2007

An Embedded System Architecture for Wireless Neural Recording

Shahin Farshchi; Aleksey Pesterev; Eric Guenterberg; Istvan Mody; Jack W. Judy

We have designed and tested a complete end-to-end neural-signal communications system. To achieve a compromise between programmability and size/power consumption, we have used the TelosB mote as a platform for our wireless signal acquisition, processing, and communications device. The system operates in two modes of operation: (1) real-time, in which the raw signal is acquired via a custom neural-signal amplifier circuit, ADPCM compressed, and transmitted in real time at a rate of 4000 12-bit samples per second; (2) and spike-detection, where data is sampled at a rate of 16670 12-bit samples per second, and spike waveforms are detected via an adaptive absolute threshold algorithm. Data is transmitted wirelessly to a gateway mote, which forwards the signals to an archive server. The archive server makes the neural signals available to a client application, which retrieves waveforms and detected spike parameters. The client application also enables the user to set amplifier gain and high-pass corner frequency remotely. The system consumes approximately 50 mW of power in the real-time mode of operation, and approximately 1 to 5 mW of power in the spike-acquisition mode of operation. The animal-mounted sensor is approximately the size of a matchbox, and weighs 66 g.


international conference of the ieee engineering in medicine and biology society | 2004

A TinyOS-based wireless neural interface

Shahin Farshchi; Istvan Mody; Jack W. Judy

The overlay of a neural interface upon a TinyOS-based sensing and communication platform is described. The system amplifies, digitally encodes, and transmits two EEG channels of neural signals from an un-tethered subject to a remote gateway, which routes the signals to a client PC. This work demonstrates the viability of the TinyOS-based sensor technology as a foundation for chronic remote biological monitoring applications, and thus provides an opportunity to create a system that can leverage from the frequent networking and communications advancements being made by the global TinyOS-development community.


International Journal of Circuit Theory and Applications | 2011

A low-power small-area 10-bit analog-to-digital converter for neural recording applications

Mohammad Hossein Zarifi; Javad Frounchi; Mohammad Ali Tinati; Shahin Farshchi; Jack W. Judy

In vivo neural recording systems require low power and small area, which are the most important parameters in such systems. This paper reports a new architecture for reducing the power dissipation and area, in analog-to-digital converters (ADCs). A time-based approach is used for the subtraction and amplification in conjunction with a current-mode algorithm and cyclical stage, which the conversion reuses a single stage for three times, to perform analog-to-digital conversion. Based on introduced structure, a 10-bit 100-kSample/s time-based cyclical ADC has been designed and simulated in a standard 90-nm Complementary Metal Oxide Semiconductor (CMOS) process. Design of the system-level architecture and the circuits was driven by stringent power constraints for small implantable devices. Simulation results show that the ADC achieves a peak signal-to-noise and distortion ratio (SNDR) of 59.6 dB, an effective number of bits (ENOB) of 9.6, a total harmonic distortion (THD) of −64dB, and a peak integral nonlinearity (INL) of 0.55, related to the least significant bit (LSB). The ADC active area occupies 280µm × 250µm. The total power dissipation is 5µW per conversion stage and 20µW from an 1.2-V supply for full-scale conversion. Copyright


international conference of the ieee engineering in medicine and biology society | 2008

A low-power, low-noise neural-signal amplifier circuit in 90-nm CMOS

Mohammad Hossein Zarifi; Javad Frounchi; Shahin Farshchi; Jack W. Judy

A fully-differential low-power low-noise preamplifier for biopotential and neural-recording applications is presented. This design, which has been simulated in a standard 90-nm CMOS process, consumes 30 μW from a 3-V power supply. The simulated integrated input-referred noise is 2.3 μV over 0.1 Hz to 20 kHz. The amplifier also provides an output swing of ± 0.9 V with a THD of less than 0.1%


international conference of the ieee engineering in medicine and biology society | 2007

Towards Neuromote: A Single-Chip, 100-Channel, Neural-Signal Acquisition, Processing, and Telemetry Device

Shahin Farshchi; Dejan Markovic; Sudhakar Pamarti; Behzad Razavi; Jack W. Judy

This paper investigates the design of a single-chip, 100-channel wireless neural-signal acquisition, processing, and communications device. Design approaches for realizing front- end neural-signal amplifier, data conversion, microprocessor, and trasceiver circuitry have been outlined.


biennial university/government/industry microelectronics symposium | 2006

Low-Noise Amplifier Circuit for Embedded Electrophysiological Recording with Adjustable Gain and High-Pass Filtering

Shahin Farshchi; Jack W. Judy

This paper describes a fully-integrated, differential, dual-channel, gain-adjustable and bandwidth-adjustable neural preamplifier circuit. This chip has been designed to enable commercial-off-the-shelf (COTS) embedded-networked sensors (ENS) to acquire electrophysiological signals from mobile test subjects, while allowing for the user to remotely adjust amplifier gain and high-pass filtering characteristics for dynamically switching between local field potential and spike acquisition. The preliminary data presented in this paper has been derived from circuit simulations in Spectre, as the chip has been submitted for fabrication in a standard dual-poly dual-metal 1.5-mum process. The 2.2 times 2.2-mm2 chip will consume 127 muA of standby current per channel while operating from a single 3-V supply. Gain and high-pass corner frequency are voltage controlled, and can vary between 40 to 90 dB, and 0.1 to 1000 Hz, respectively, while rejecting the large DC offsets that occur at the interface between the tissue and electrode surface. The low-pass cutoff frequency is set to approximately 10 kHz. Simulated input-referred noise is 4.4 muVrms between 0.5 and 5000 Hz.

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Aleksey Pesterev

Massachusetts Institute of Technology

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Istvan Mody

University of California

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Alex Pesterev

University of California

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Dejan Markovic

University of California

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