Shahrokh Ahmadi

Integrated CMOS surface acoustic wave gas sensor: design and characteristics

The development of inexpensive and miniaturized Surface Acoustics Wave (SAW) gas sensors that are highly selective and sensitive is described. These sensors are implemented with micro-electro-mechanical systems (MEMS) in CMOS technology. IDT equivalent circuit and model for SAW delay line is introduced. Simulation results are included for characterization and design of the sensor. In this paper we will describe the design and post-processing steps to implement SAW device in CMOS technology. Design parameters of this device were obtained using modeling equivalent circuit to characterize sensor. Two approaches were used in the design of the SAW gas sensor that will be discussed. A CMOS chip was fabricated using MOSIS. Thin film ZnO was grown on Silicon based die and its characterizations is presented.

CMOS integrated gas sensor chip using SAW technology

The development of inexpensive and miniaturized SAW gas sensors that are highly selective and sensitive is introduced. These sensors are implemented with micro-electro-mechanical systems (MEMS) in CMOS technology. Since the sensors are fabricated on a silicon substrate, additional signal processing circuitry can easily be integrated into the chip thereby readily providing functions such as multiplexing and analog-to-digital conversion that are needed for integration into a network.

Characterization of multi- and single-layer structure SAW sensor [gas sensor]

The design of CMOS compatible thin ZnO film base, and LiNbO/sub 3/ wafer base, surface acoustics wave (SAW) gas sensors, that are highly selective and sensitive, is described. Furthermore, design and post-CMOS processing fabrication steps that utilises micro-electro-mechanical systems (MEMS) techniques to implement the SAW gas sensor are presented. The Rayleigh wave velocity for various ZnO film thicknesses is simulated and results are presented. The velocity calculation is based on a computer simulation of a multilayer (ZnO/SiO/sub 2//Si) structure that uses wave equations. Simulation results and experimental measurements of SAW sensors with a single layer bulk LiNbO/sub 3/ wafer are shown, and compared. Moreover, results of experimentation and simulation of wave velocity for a yz-cut LiNbO/sub 3/ wafer are shown.

CMOS surface acoustic wave oscillators

In this paper we describe the design and implementation of a CMOS surface acoustic wave (SAW) oscillator. The oscillator utilizes surface acoustic wave resonators implemented in both 1.6micron and 0.5micron AMI CMOS process and fabricated through MOSIS. When connected to Pierce oscillator circuits, these resonators are capable of synthesizing frequencies in the range of 400MHz to 1GHz. This paper also addresses the design issues involving codesigning micromachined resonators with CMOS circuitry to optimize the oscillator design

Signal conditioning for Fabry-Perot sensor

In this paper, a Fabry-Perot based spectrometer and some of its advantages and applications are discussed. The CMOS fabrication processing steps for a MEMS design of a Fabry-Perot and a companion photodiode are shown. This companion photodiode of Fabry-Perot converts the filtered light intensity into an electrical signal. A CMOS integrated circuit is designed for the signal conditioning and processing of photodiode electrical signal. Using the CMOS integrated circuit, the analog signal is converted into a digital form and is available in an 8-bit bus for further processing.

A 480 MHz Band-Pass Sigma Delta Analog to Digital Modulator with Active Inductor Based Resonators

This chapter presents a 480 MHz, continuous time, 6th order band-pass Sigma Delta Analog to Digital modulator in IBM 0.18 um CMOS technology. We replace traditional RLC circuits, containing spiral inductors with high quality factor, active inductor based resonators utilizing negative impedance circuits. This reduces chip area and eliminates post processing needs. Pad to pad simulation of the extracted layout in Cadence yields an enhanced SNDR of 70 dB and power consumption of 29 mW. The modulator occupies 0.5 mm2 of chip area.

A 6 th order continuous time band-pass Sigma Delta Analog to Digital modulator with active inductor based resonators

This paper presents a 6th order, continuous time bandpass Sigma Delta Analog to Digital modulator in IBM 0.18 um CMOS technology. In order to decrease chip area we replace traditional RLC circuits, containing low quality factor spiral inductors with high quality factor, active inductor based resonators utilizing negative impedance circuits. We see a reduction in chip area and post processing needs are eliminated. Pad to pad simulation of the extracted layout in Cadence yields an enhanced SNDR of 70 dB and a power consumption of 29 mW. An extra active inductor resonator is included on chip for characterization. Our modulator occupies 0.5 mm2 of chip area without pads.

A 400 MHz delta-sigma modulator for bandpass IF digitization around 100 MHz with excess loop delay compensation

The past few years has seen a tremendous amount of work being published in the area of continuous-time delta-sigma ADC designs with various compensation techniques to counter its susceptibility to non-idealities like clock jitter and excess loop delay, to name a few. The focus of this paper is the design of a tunable continuous time bandpass delta-sigma modulator that utilizes an excess loop delay compensation technique proposed in [1] to optimize the SNR of the modulator, besides preserving its stability by incorporating a full clock cycle delay. An improved, low noise, compact gyrator-C structure is proposed to obtain a high-Q bandpass filter subsequently used in the design of a second-order bandpass delta-sigma modulator clocked at 400 MHz for direct conversion of narrow band signals around 100 MHz. The proposed structure eliminates the need of a capacitor bank/array for the coarse tuning of the modulator since this structure enables coarse tuning in the range of 80 to 120 MHz and fine tuning of 5 MHz above or below the centre frequency. This modulator has been implemented in AMI 0.5µ CMOS process and achieves an SNR of 46 dB over a bandwidth of 1 MHz, calculated from post-layout simulations. The power consumption of this design is 49 mW at a supply of 3V.

ZnO based SAW delay line sensor: fabrication and characteristics

ZnO, a well-known piezoelectric material, is used to develop micro-scale surface acoustic wave (SAW) delay line sensor. In this work, SAW delay line sensors are fabricated employing ZnO films that are deposited by RF sputtering technique. Films are characterized prior to device fabrication by X-ray diffraction (XRD) for film crystalline quality, UV-visible transmission spectroscopy for optical characteristics, and atomic force microscopy (AFM) for surface morphology. Interdigital electrodes producing surface acoustic waves in the hundreds of MHz are developed by photolithography and metallization techniques. SAW delay line sensor device testing, measurement and characteristics on RF sputtered ZnO films are presented and compared.

An on chip signal processing and Fabry-Perot sensor using multi-slopes architecture

In this paper, a Fabry-Perot based optical smart sensor and some of its advantages and applications are discussed. Basics of optical sensors and tight intensity modulations, with regard to the smart sensor, are discussed. The CMOS/MEMS implementation and fabrication of a Fabry-Perot sensor and its companion photodiode are shown. This companion photodiode of Fabry-Perot converts the filtered light intensity into an electrical signal. A CMOS integrated circuit is designed for the signal conditioning and processing of photodiode electrical signal. Using the CMOS integrated circuit, the analog signal is converted into a digital form and is available in an 8-bit bus for further processing.