Shangyang Xiao

An Active Compensator Scheme for Dynamic Voltage Scaling of Voltage Regulators

Dynamic voltage scaling (DVS) technique is a common industry practice in optimizing power consumption of microprocessors by dynamically altering the supply voltage under different operational modes, while maintaining the performance requirements. During DVS operation, it is desirable to position the output voltage to a new level commanded by the microprocessor (CPU) with minimum delay. However, voltage deviation and slow settling time usually exist due to large output capacitance and compensation delay in voltage regulators. Although optimal DVS can be achieved by modifying the output capacitance and compensation, this method is limited by constraints from stringent static and dynamic requirements. In this paper, the effects of output capacitance and compensation network on DVS operation are discussed in detail. An active compensator scheme is then proposed to ensure smooth transition of the output voltage without change of power stage and compensation during DVS. Simulation and experimental results are included to demonstrate the effectiveness of the proposed scheme.

Power Loss Analyses for Dynamic Phase Number Control in Multiphase Voltage Regulators

To improve efficiency over a wide load range, it is important to dynamically adjust the operational phase number in multiphase voltage regulators. This paper analyzes in detail the power loss profile of a synchronous multi-phase buck converter and defines the optimal phase number under different load conditions. Experimental results are provided to verify the theoretical results.

Adaptive Modulation Control for Multiple-Phase Voltage Regulators

This paper presents a new Adaptive Modulation Control (AMC) method which has proven to be very effective in achieving high bandwidth designs. AMC is a type of nonlinear control since it works only during large dynamic load transitions. Influence of AMC in both the time domain and frequency domain is analyzed. Simulation results and experimental data are included to show a very high bandwidth as well as excellent transient performance.

Parasitic resistance current sensing topology for coupled inductors

Traditional current sensing topology based on inductor equivalent series resistance fails to extract phase currents for coupled inductors due to the presence of the magnetising inductance. This article proposes a new direct-current resistance current sensing topology for coupled inductors. By implementation of a simple resistor-capacitor network, the proposed topology can preserve the coupling effect between phases. As a result, real phase inductor currents and total current can be sensed. Detailed mathematical analysis and design equations are presented in this article. Sensitivity and mismatch issues are addressed. Experimental results show that the proposed topologies are able to extract phase current as well as total current with acceptable accuracy.

Investigating effects of magnetizing inductance on coupled-inductor voltage regulators

Coupled inductors are an emerging topology for computing power supplies as next generation CPU requirements for high efficiency and fast transient response pose great challenge on voltage regulator design. This paper addresses the effects of magnetizing inductance on current-balancing, dynamic response, and current-sensing of multiphase voltage regulator with coupled inductors. State Space Averaging and other mathematical analysis methods are employed. Experimental results are provided to verify the analysis.

A new active compensator scheme for dynamic voltage scaling in voltage regulators

Dynamic voltage scaling (DVS) techniques are used to optimize the power consumption of the microprocessor by reducing the operating voltage under light-load conditions. To maximize the power saving of DVS, the voltage regulator should adjust the operating voltage to the new voltage commanded by the system as soon as possible. However the voltage regulator output capacitors and the compensation network may impact the voltage transitioning and settling time during DVS operation. In this paper, these impacts are discussed in detail and an active compensator scheme is proposed to optimize the DVS performance. Experimental results are included to illustrate the effectiveness of the proposed scheme.

Improving Transient Performance for Voltage Regulators with Error Amplifier Voltage Positioning

Next generation microprocessor requirements for high current slew rates and fast transient response together with low output voltages have posed great challenges on voltage regulator (VR) design. This paper presents a new error amplifier voltage positioning (EAVP) method which has proven to be effective in achieving fast transient response for voltage regulators. Unlike prior arts of non-linear control methods, it does not modify the power stage nor change the control loop gain. Instead, it helps error amplifier recover from its saturation status during transient events. Operational mechanism of the EAVP is presented in this paper in detail. Simulation results and experimental data show that the EAVP scheme settles down the output voltage quickly after a heavy load transition, resulting in excellent transient performance without impact on other operations.