Shao-Hua Lee

Low-Phase Noise Hartley Differential CMOS Voltage Controlled Oscillator

This letter presents a novel Hartley low phase noise differential CMOS voltage-controlled oscillator (VCO). The low noise CMOS VCO has been implemented with the TSMC 0.18-mum 1P6M CMOS technology and adopts full PMOS to achieve a better phase noise performance. The VCO operates from 4.02 to 4.5GHz with 11.3% tuning range. The measured phase noise at 1-MHz offset is about -119dBc/Hz at 4.02GHz and 122dBc/Hz at 4.5GHz. The power consumption of the VCO core is 6.75mW

A Low Voltage Divide-by-4 Injection Locked Frequency Divider With Quadrature Outputs

This letter presents a low voltage quadrature divide-by-4 (divide4) injection-locked frequency divider (QILFD). The QILFD consists of a 1.8-GHz quadrature voltage controlled oscillator (QVCO) and two NMOS switches, which are inserted into the quadrature outputs of the QVCO for signal injection. The low-voltage CMOS divide4 QILFD has been implemented with the TSMC 0.18-mum 1P6 M CMOS technology and the core power consumption is 3.12mW at the supply voltage of 1.2V. The free-running frequency of the QILFD is tunable from 1.73 to 1.99GHz, the measured phase noise of QILFD is -118dBc/Hz at 1-MHz offset from the free running frequency of 1.82GHz. At the input power of 0dBm, the total locking range is from 6.86 to 8.02GHz as the tuning voltage is varied from 0 to 1.2V. The phase noise of the locked output spectrum is lower than that of free running ring oscillator by 11dBc/Hz. The phase deviation of quadrature output is about 0.8deg

A Low Power Injection Locked

This letter presents a new current reused LC-tank injection locked oscillator (ILO), which is implemented by using a standard TSMC 0.18-mum CMOS process. The ILO, used as a divide-by-two (divide2) divider, is consisted of two switching transistors stacked in series. The injection locking is performed by adding an injection nMOS between the differential outputs of the divider. The divider can operate with a lower power due to the reuse of dc current. The measurement results show that at the supply voltage of 1.5V, the divider free-running frequency is tunable from 2.11 to 2.42GHz, and at the incident power of 0dBm the locking range of the divider in the divide2 mode is about 0.9GHz (19.8%), from the incident frequency 4.1 to 5GHz. The core power consumption is 0.97mW

LC

A 900-MHz two-stage CMOS voltage controlled ring oscillator with wide operating frequency tuning range is presented in This work. It is implemented with a 0.18-/spl mu/m CMOS technology and biased at 1.8-V supply voltage. Its frequency tuning range is from 440 MHz to 1595 MHz. The VCO can function even biased at 1 V. And the phase noise is -73.3 dBc/Hz at 100 kHz frequency offset and -93 dBc/Hz at 1MHz.

-Tank Oscillator With Current Reused Topology

This letter proposes a divide-by-four injection-locked frequency divider (ILFD) with the use of a subharmonic mixer and a divide-by-two frequency divider (D2FD). The D2FD circuit consists of a two-stage differential CMOS ring oscillator with n-MOS switches directly coupled to its differential outputs, the measured phase noise of the D2FD is -97 dBc/Hz at 1-MHz offset from the free running frequency of 1.08GHz. The low-voltage CMOS divide-by-four FD (D4FD) has been implemented with the UMC 0.18-mum 1P6M CMOS technology and the power consumption is 9 mW at the supply voltage of 1.2 V. At the input power of 0 dBm, the D4FD can function properly with about 330-MHz locking range from 4.15 to 4.48GHz

A low voltage 900 MHz voltage controlled ring oscillator with wide tuning range

A 4.8GHz low-noise quadrature Colpitts VCO is presented. Use of the current switching differential Colpitts configuration together with super harmonic coupling scheme for quadrature signal generation ensures low phase noise operation. The advantage of proposed differential VCO is analyzed in terms of power consumption, phase noise, and figure of merit. The QVCO has been fabricated with the 0.18-m TSMC CMOS technology for 4.8GHz band operation and the obtained phase noise is -120 dBc/Hz at 1MHz offset frequency while 7mA current consumption and 12.6mW power consumption from 1.8V power supply

A Frequency Divider Implemented With a Subharmonic Mixer and a Divide-by-Two Divider

This paper presents a new voltage controlled oscillator (VCO) topology for radio frequency operation. The low phase noise differential CMOS VCO uses capacitive degeneration and transformer coupling between the gate and source of the negative conductance transistor. An on chip transformer in positive feedback is used to increase the voltage swing in resonator and to improve the phase noise. The VCO is tunable from 2.85 GHz to 3.35 GHz with 16% tuning range, and has been fabricated with 0.18mum CMOS technology. The measured phase noise at 1 MHz offset is -119 dBc/Hz at the operation frequency of 3 GHz. The circuit draws 10 mA from a 1.8V supply

A 4.8GHz Low-Phase Noise Quadrature Colpitts VCO

The design of a low-voltage 2.4GHz voltage controlled oscillator (VCO) employing 3D helical inductors fabricated in the 0.18-mum 1P6M CMOS technology is reported. The LC resonators consist of two 3D helical inductors and varactors. The aim of using 3D inductor is to reduce chip size, the inductance of inductor is designed to be 2nH. and the size of the inductor is 155times155 mum2. At the supply voltage of 1.0V, the VCO core consumes power of 2.6mW and the measured phase noise is -116.8dBc/Hz at 1MHz offset from the oscillation frequency of 2.46GHz. The output frequency can be tuned from to 2.06GHz to 2.5GHz

A New CMOS VCO Topology with Capacitive Degeneration and Transformer Feedback

This paper presents a LC-tank injection locked frequency divider with Complementary structure. The frequency divider is implemented using a standard UMC 0.18-mum CMOS process. The proposed circuit adds an injection nMOS transistor between the differential outputs of the frequency divider with the structure of complementary VCO that contains a tapped LC resonator. The measurement results show that at the supply voltage of 1.2V. the divider free-running frequency is tunable from 1.86-GHz to 2.31-GHz, the locking range in divide-by-2 mode is about 1.52-GHz (35.7%), and the locking range in the divide-by-4 mode is about 2.05-GHz (24.4%). The core power consumption is 4.08mW.

A Low-Voltage 2.4GHz VCO with 3D Helical Inductors

The design of a low phase noise 4 GHz voltage controlled oscillator (VCO) based on tapped inductor with 10% frequency tuning range fabricated in 0.18-um 1P6M CMOS technology is reported. The LC resonator consists of two tapped inductors and varactors. The varactors have one control terminal to vary the effective resonator capacitance, which is used to fine tune VCO output frequency. The VCO core consumes power of 7.5 mW at 1.5 V supply voltage. The measured phase noise is -121 dBc/Hz at 1MHz offset from the oscillation frequency of 4.4 GHz. The oscillation frequency can be tuned from to 4.05 GHz to 4.47 GHz. This topology can reduce the drain-to-body junction capacitance and can increase the tuning range.