Shaojian Su

GeSn p-i-n photodetector for all telecommunication bands detection

Using a 820 nm-thick high-quality Ge0.97Sn0.03 alloy film grown on Si(001) by molecular beam epitaxy, GeSn p-i-n photodectectors have been fabricated. The detectors have relatively high responsivities, such as 0.52 A/W, 0.23 A/W, and 0.12 A/W at 1310 nm, 1540 nm, and 1640 nm, respectively, under a 1 V reverse bias. With a broad detection spectrum (800-1800 nm) covering the whole telecommunication windows and compatibility with conventional complementary metal-oxide-semiconductors (CMOS) technology, the GeSn devices are attractive for applications in both optical communications and optical interconnects.

High-mobility germanium-tin (GeSn) P-channel MOSFETs featuring metallic source/drain and sub-370 °C process modules

We report the first demonstration of GeSn pMOSFETs. Key highlights of this work also includes a 180 °C GeSn MBE growth, sub-370 °C Si<inf>2</inf>H<inf>6</inf> surface passivation and gate stack process for GeSn, and an implantless metallic NiGeSn S/D formed at 350 °C. A hole mobility of 430 cm²/Vs is obtained for GeSn pMOSFETs, which is 66% higher than that of the Ge control pMOSFETs. GeSn pMOSFETs show a 64% lower S/D resistance as compared to the Ge control devices.

High-responsivity GeSn short-wave infrared p-i-n photodetectors

Surface-illuminated GeSn p-i-n photodetectors (PDs) with Ge0.964Sn0.036 active layer on Ge substrate were fabricated. Photodetection up to 1.95 μm is achieved with a responsivity of 0.13 A/W. High responsivities of 0.56 and 0.71 A/W were achieved under a reverse bias voltage of 3 V at 1640 and 1790 nm, respectively. A low dark current of 1.08 μA was obtained at a reverse bias of 1 V with a diameter of 150 μm, which corresponds to a current density of 6.1 mA/cm2. This value is among the lowest dark current densities reported among GeSn PDs.

Valence band offset of ZnO/Zn0.85Mg0.15O heterojunction measured by x-ray photoelectron spectroscopy

X-ray photoelectron spectroscopy was used to measure the valence band offset at the ZnO/Zn0.85Mg0.15O heterojunction grown by plasma-assisted molecular beam epitaxy. The valence band offset (ΔEV) is determined to be 0.13 eV. According to the experimental band gap of 3.68 eV for the Zn0.85Mg0.15O, the conduction band offset (ΔEC) in this system was calculated to be 0.18 eV. The ΔEc:ΔEv in ZnO/Zn0.85Mg0.15O heterojunction was estimated to be 3:2.

Electroluminescence from Ge on Si substrate at room temperature

A Ge/Si heterojunction light emitting diode with a p(+)-Ge/i-Ge/N+-Si structure was fabricated using the ultrahigh vacuum chemical vapor deposition technology on N+-Si substrate. The device had a good I-V rectifying behavior. Under forward bias voltage ranging from 1.1 to 2.5 V, electroluminescence around 1565 nm was observed at room temperature. The mechanism of the light emission is discussed by the radiative lifetime and the scattering rate. The results indicate that germanium is a potential candidate for silicon-based light source material

Towards direct band-to-band tunneling in P-channel tunneling field effect transistor (TFET): Technology enablement by Germanium-tin (GeSn)

In this work, we report the first demonstration of GeSn pTFET. Good device characteristics were obtained. This may be attributed to direct BTBT, high hole mobility in the GeSn channel, and the formation of abruptly and heavily doped N+ source. The ION performance can be improved with further device optimization.

Strained germanium-tin (GeSn) N-channel MOSFETs featuring low temperature N+/P junction formation and GeSnO2 interfacial layer

In this paper, we report the worlds first germanium-tin (GeSn) channel nMOSFETs. Highlights of process module advances are: low temperature (400 °C) process for forming high quality n+/p junction with high dopant activation and reduced dopant diffusion; interface engineering achieved with GeSnO2 interfacial layer (IL) between high-k gate dielectric and GeSn channel. A gate-last process was employed. The GeSn nMOSFET with GeSnO2 IL demonstrates a substantially improved SS in comparison with Ge control, and an ION/IOFF ratio of 104.

Full-Field Strain Mapping at a Ge/Si Heterostructure Interface

The misfit dislocations and strain fields at a Ge/Si heterostructure interface were investigated experimentally using a combination of high-resolution transmission electron microscopy and quantitative electron micrograph analysis methods. The type of misfit dislocation at the interface was determined to be 60° dislocation and 90° full-edge dislocation. The full-field strains at the Ge/Si heterostructure interface were mapped by using the geometric phase analysis (GPA) and peak pairs analysis (PPA), respectively. The effect of the mask size on the GPA and PPA results was analyzed in detail. For comparison, the theoretical strain fields of the misfit dislocations were also calculated by the Peierls-Nabarro and Foreman dislocation models. The results showed that the optimal mask sizes in GPA and PPA were approximately three tenths and one-tenth of the reciprocal lattice vector, respectively. The Foreman dislocation model with an alterable factor a = 4 can best describe the strain field of the misfit dislocation at the Ge/Si heterostructure interface.

Strain Field Mapping of Dislocations in a Ge/Si Heterostructure

Ge/Si heterostructure with fully strain-relaxed Ge film was grown on a Si (001) substrate by using a two-step process by ultra-high vacuum chemical vapor deposition. The dislocations in the Ge/Si heterostructure were experimentally investigated by high-resolution transmission electron microscopy (HRTEM). The dislocations at the Ge/Si interface were identified to be 90° full-edge dislocations, which are the most efficient way for obtaining a fully relaxed Ge film. The only defect found in the Ge epitaxial film was a 60° dislocation. The nanoscale strain field of the dislocations was mapped by geometric phase analysis technique from the HRTEM image. The strain field around the edge component of the 60° dislocation core was compared with those of the Peierls–Nabarro and Foreman dislocation models. Comparison results show that the Foreman model with a = 1.5 can describe appropriately the strain field around the edge component of a 60° dislocation core in a relaxed Ge film on a Si substrate.

Towards high performance Ge 1−x Sn x and In 0.7 Ga 0.3 As CMOS: A novel common gate stack featuring sub-400 °C Si 2 H 6 passivation, single TaN metal gate, and sub-1.3 nm EOT

We report a novel common gate stack solution for Ge_1-xSn_x P-MOSFET and In_0.7Ga_0.3As N-MOSFET, featuring sub-400°C Si₂H₆ passivation, sub-1.3 nm EOT, and single TaN metal gate. Symmetric V_TH, high performance, low gate leakage, negligible hysteresis, and excellent reliability were realized. Using this gate stack, the worlds first GeSn short-channel device with gate length L_G down to 250 nm was realized. Drive current of more than 1000 μA/μm was achieved, with peak intrinsic transconductance of ~465 μS/μm at V_DS of -1.1 V.