Shen Xiaofeng

An ultra high-speed 8-bit timing interleave folding & interpolating analog-to-digital converter with digital foreground calibration technology

A 2-Gsample/s 8-b analog-to-digital converter in 0.35 μm BiCMOS process technology is presented. The ADC uses the unique folding and interpolating algorithm and dual-channel timing interleave multiplexing technology to achieve a sampling rate of 2 GSPS. Digital calibration technology is used for the offset and gain corrections of the S/H circuit, the offset correction of preamplifier, and the gain and clock phase corrections between channels. As a result of testing, the ADC achieves 7.32 ENOB at an analog input of 484 MHz and 7.1 ENOB at Nyquist input after the chip is self-corrected.