Sherif Hammad

Networked embedded generalized predictive controller for an active suspension system

This paper applies the generalized predictive control (GPC) to a class of active suspension automotive systems. It introduces both physical and digital necessary models for simulation and control law design. Experimental environment is designed in order to get real time identification and control verification results. Real time CAN-bus Networked Embedded Control System (NECS) represents the backbone of this environment. Real-Time experimental results show the efficiency of the proposed tuning of the GPC controller in order to get a ride-comfort with an acceptable level of exerted energy.

MPC-On-Chip: An Embedded GPC Coprocessor for Automotive Active Suspension Systems

Safety critical automotive systems require tight real-time constraints. This letter presents a case study for embedded implementation of a model predictive controller (MPC) used to control an automotive active suspension system. It proposes a special purpose coprocessor for solving the online mathematical optimization needed by the controller, while maintaining real-time constraints imposed by system dynamics. Mathematical formulation for the optimum usage of hardware resources is provided and verified for its applicability on a proposed platform.

Hardware EDF scheduler implementation on controller area network controller

Controller Area Network (CAN) is widely used in real-time automobile control and is gaining wider acceptance as a standard for automotive networking. The applicability of Earliest Deadline (EDF) techniques to the scheduling of CAN messages has been shown in previous researches. Earliest deadline can guarantee higher network utilization than fixed-priority schemes like Deadline or Rate Monotonic (DM, RM), but the EDF technique continuous deadlines (priorities) update at each scheduling round results in high CPU overhead. The paper describes a way to decrease such CPU overhead by implementing EDF scheduler dedicated hardware and embedding it within the CAN controller open core IP. Consequently high reduction in CPU overhead is achieved. This paper also validates the design and implementation of the hardware EDF algorithm on a commonly used CAN controller connected on a SoC design. Hence, this paper can be considered as introducing a new generation of more efficient CAN controllers to be used in several industry domains.

Towards automating hardware/software co-design

We propose a new flow for hardware/software co-design that forms a base for further automation attempts of the co-design process. Our proposed flow starts with a software-only solution in which all system functionality is described as embedded software written in C targeting a selected platform. Then, the flow iterates through co-verification, profiling, partitioning, and co-synthesis until the design criteria are met. We present two test cases to show the effectiveness of our proposed methodology.

An embedded implementation of the Generalized Predictive Control algorithm applied to automotive active suspension systems

The Generalized Predictive Control (GPC) algorithm relies on the solution of an optimization problem at every sampling period. Profiling shows that matrix operations consume the largest portion of the computation requirements of the algorithm. This paper presents an embedded real-time implementation of the GPC algorithm, called GPC-on-Chip, based on the state-of-the-art Customizable Advanced Processor (CAP9(TM)) technology from Atmel(R), targeting automotive active suspension systems. Our system utilizes a systolic-array based matrix co-processor in order to accelerate matrix operations. The proposed embedded system is designed to fit within the proposed platform while meeting tight real-time constraints imposed by automotive active suspension systems. In order to check the applicability of the proposed system-on-chip, it is profiled against a wide variety of GPC tuning parameters and compared against the software-only implementation. An average speedup of approximately 10x is achieved.

Model-based embedded software development flow

The need for new embedded software development design methodologies arises from the increasing complexity and sophistication of embedded systems. The paper proposes a novel approach for model-driven development and verification of embedded software. This approach mainly depends on the separation of design and implementation phases of the development process. The proposed design comprises two main phases for development: modeling the software using xtUML and fully verifying the model to match specification, then the generation of the embedded software code from the created model. Following this approach allows helps to discover specification errors early in the development process, and facilitates the reuse of various parts of the model. The proposed flow also introduces the possibility of using Model Based Testing (MBT) tools for automatic test generation. Using, this complete flow, only the effort of creating two models (one for software module code generation and one for test generation) will be required replacing the traditional complete design, implementation, test design, test implementation and test execution flow.

FPGA-Based Low-level CAN Protocol Testing

The paper proposes a new approach for testing a CAN bus at the bit-level. It depends on generation of bus errors to cover crucial corner cases. The design makes it possible to go beyond regular frame level testing that is provided by many commercial tools. It goes deep in bit-stream level testing and injection. The proposed design is verified using an FPGA system on chip. Verification results are good against design requirements

A distributed genetic algorithm for swarm robots obstacle avoidance

Obstacle avoidance is an extremely important task in swarm robotics as it saves robots from hitting objects and being damaged. A Genetic algorithm can be used to teach robots how to avoid obstacles in different environments. However the evaluation module of this genetic algorithm can be very time consuming module as each candidate solution should be evaluated N times. This paper explains the methodology used to distribute the evaluation module of genetic Algorithm over a cluster of computers to speed up the algorithm. The proposed methodology can be used for any application which suffers from time consuming evaluation module. Experimental results showed that the speedup can reach 70x.

CAN bus analyzer and emulator

A need arises when using CAN buses to monitor the data on the bus as well as having the ability to inject further data onto it. This provides the ability to fully test a CAN network on both the frame level and the bit level. This paper introduces a new CAN bus analyzer and emulator. The proposed System on Chip (SoC) is verified by simulation and implementation on FPGA board. Real time results show the efficiency of the SoC in bus analysis and CAN node emulation.

A PLATFORM APPROACH FOR HARDWARE/SOFTWARE CO-DESIGN WITH SUPPORT FOR RTOS-BASED SYSTEMS

We propose a new flow for hardware/software co-design, based on the platform-based design, which forms a base for further automation attempts of the co-design process. We prove the applicability of the proposed flow on co-designing generic systems as well as RTOS-based systems. Our proposed flow starts with a software-only solution in which all system functionality is described as embedded software targeting a selected platform. Then, the flow iterates through co-verification, profiling, partitioning, and co-synthesis until the design criteria are met. We present four test cases to show the effectiveness of our proposed methodology. The main contribution added by the proposed methodology is incorporating the target application platform at the first stage of the flow then applying our iterative co-design algorithm without altering the main platform. This opposes other co-design methodologies that let the platform details be synthesized at later stages, widening the exploration space to be unrealistic and producing platforms that may vary to a large extent compared to the pre-verified application platform. The other contribution is the study provided on the effect of co-design on the behavior of RTOS-based platforms, which brings the flow closer to real-case problems, where most embedded systems utilize RTOS in their software stack.