Shichang Chen

Transient Analysis of Through-Silicon Vias in Floating Silicon Substrate

For through-silicon vias (TSVs) in a floating silicon substrate, electric fields from signal TSVs terminate at ground TSVs instead of the substrate. The MOS capacitance of TSVs in a floating silicon substrate is quite different from that of TSVs in a well-grounded silicon substrate. Therefore, it is essential to perform transient analysis of such TSVs to facilitate designs and applications of 2.5-D and 3-D ICs. This paper presents a systematic study of time-domain responses of TSVs in a floating silicon substrate. Impacts of the floating substrate and the temperature are considered and investigated thoroughly. The equivalent circuit models are developed and applied to predict the signal propagation. The crosstalk voltages among TSVs are accurately captured and compared for different oxide charges and temperatures.

A broadband three-device Doherty power amplifier based on a modified load modulation network

This paper proposes a broadband three-device Doherty power amplifier design. A new load modulation network with a shunt quarter-wavelength (λ/4) short stub is introduced for bandwidth extension. Comprehensive analysis of the proposed configuration is given to illustrate the operational principle. For demonstration purpose, a twin-peaking single-carrier Doherty amplifier prototype is devised based on three identical 10W GaN HEMTs. Measurement results show that at least 40% drain efficiency is achieved at 8-dB back-off power, from 2.0 to 2.6 GHz.

Compact Doherty Power Amplifier Design for 2

A triple-transistor Doherty power amplifier (PA) architecture that supports two identical input and output signals is investigated. Two peaking PAs and a single carrier PA are arranged to operate at high and low power regions. This structure can be used in 2 × 2 multiple-input multiple-output transceiver. Compared with classic configuration that needs four transistors to realize the same functionality, the proposed design greatly reduces the overall circuit size and cost. Theoretical analysis is given for deep understanding of the operational principle regarding this novel Doherty PA. To validate the effectiveness, a prototype PA corresponding to the proposed architecture is implemented based on Crees gallium nitride high electron mobility transistor transistors. Experimental results demonstrate very high drain efficiencies at both saturation and back-off regions.

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A 60-GHz Doherty power amplifier (PA) implemented in 65-nm bulk CMOS process is proposed. A novel adaptive biasing network is devised to dynamically adjust the bias voltage of the peaking PA, counteracting its low transconductance caused by the class-C biasing condition. At 60 GHz, the fabricated Doherty PA achieves 22% drain efficiency with a saturation power of 13.2 dBm. The measured results show that over 17% and 8% efficiencies at peak and 6-dB back-off power regions are achieved, respectively, from 57 to 64 GHz.

2 Multiple-Input Multiple-Output System

This paper proposes a new broadband Doherty power amplifier topology with extended back-off range. A shunted short line or open line working as compensating reactance is introduced to the conventional load modulation network, which greatly improves its bandwidth. Underlying bandwidth extension mechanism of the proposed configuration is comprehensively analyzed. A three-device Doherty power amplifier is implemented for demonstration based on Cree’s 10 W HEMTs. Measurements show that at least 41% drain efficiency is maintained from 2.0 GHz to 2.6 GHz at 8 dB back-off range. In the same operating band, saturation power is larger than 43.6 dBm and drain efficiency is higher than 53%.

Adaptively Biased 60-GHz Doherty Power Amplifier in 65-nm CMOS

In this letter, a wideband printed loop-dipole antenna with magnetic-electric coupling is proposed. The proposed antenna consists of two coupled metallic split rings with slits on opposite sides and a parasitic metal strip. Two coupled split-rings can generate multiple operational modes such that multi-frequencies resonance can be formed. And in order to expand the bandwidth and improve the impedance matching, a parasitic metal strip besides the feed line is added. Simulated results show that the proposed antenna not only covers the low band at approximate 0.82 GHz, but also has a good fractional bandwidth of 66.7% ranging from 2.3 to 4.6 GHz. Stable unidirectional radiation patterns in the operating bandwidth are also achieved.

A Reactance Compensated Three-Device Doherty Power Amplifier for Bandwidth and Back-Off Range Extension

This work applies multilevel Greens function interpolation method (MLGFIM) to design a high-selectivity frequency selective surface (FSS). A compact FSS with two transmission zeros is proposed, and this FSS can be realized by printing two metal planes on both sides of a dielectric layer. Due to the complex structure of metal planes, MLGFIM is required for the acceleration of analysis. Simulation results using MLGFIM is demonstrated to validate the proposed design.