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Dive into the research topics where Shigeharu Yamagami is active.

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Featured researches published by Shigeharu Yamagami.


Materials Science Forum | 2006

Novel Power Si/4H-SiC Heterojunction Tunneling Transistor (HETT)

Tetsuya Hayashi; Yoshio Shimoida; Hideaki Tanaka; Shigeharu Yamagami; Satoshi Tanimoto; Masakatsu Hoshi

We demonstrate a novel power Si/4H-SiC heterojunction tunneling transistor (HETT) on the basis of theoretical analysis and experimental results. The HETT is an insulated gate drive device and has a unique switching mechanism. In the off-state, the heterojunction barrier prevents current flow between the Si source region and the 4H-SiC drift region. In the on-state, the width of the heterojunction barrier is controlled by the gate bias to allow tunneling current to flow. The HETT has a zero channel length structure that is more independent of channel mobility compared with a conventional 4H-SiC MOSFET. As a result, the HETT is expected to have low on-resistance. A HETT was fabricated with n+-type polycrystalline silicon on an n--type 4H-SiC epitaxial wafer for power devices. The fabricated HETT shows a low specific on-resistance of 6.8 mcm2 (at Jd=500 A/cm2).


Materials Science Forum | 2008

Negative Field Reliability of ONO Gate Dielectric on 4H-SiC

Satoshi Tanimoto; Tatsuhiro Suzuki; Shigeharu Yamagami; Hideaki Tanaka; Tetsuya Hayashi; Yukie Hirose; Masakatsu Hoshi

It was experimentally shown that an ONO gate dielectric carefully formed on 4H-SiC has extremely high reliability even under a negative electric field at least up to a junction temperature of 300°C, making it promising for power MOS and CMOS applications. Medium charge to failure of –30 C/cm2 was achieved for fully processed polycrystalline Si gate MONOS capacitors with an equivalent SiO2 thickness of teq = 44 nm and a 200-μm diameter. The medium time to failure of these capacitors projected for –3 MV/cm exceeds 86 and 6.3 thousand years at room temperature and 300°C, respectively. A parasitic memory action did not appear even when Eox of -6.6 MV/cm was applied for 5000 seconds.


power conversion conference | 2007

Novel SiC Power Devices utilizing a Si/4H-SiC Heterojunction

Masakatsu Hoshi; Testuya Hayashi; Hideaki Tanaka; Shigeharu Yamagami

We have developed novel SIC devices, both a diode and a transistor, utilizing a Si/4H-SiC heteroj unction. A heterojunction diode (HJD) was fabricated with P+ polycrystalline silicon on an N- epitaxial layer of 4H-SiC. The HJD achieved lower Von and higher reverse blocking voltage than a commercial Schottky barrier diode (SBD) of SiC. Switching charcteristics of the HJD indicated almost zero reverse recovery similar to that of a SBD. A hetero junction tunneling transistor (HETT) was driven by an insulated gate electrode. The width of the heterojunction barrier was controlled by the gate bias to allow tunneling current to flow. The HETT was fabricated with N+ polycrystalline silicon on an N- 4H-SiC epitaxial layer. The channnel length of the HETT was almost zero and was expected to have low on-resistance.


Materials Science Forum | 2014

SiC Trench MOSFET with an Integrated Low Von Unipolar Heterojunction Diode

Wei Ni; Kenta Emori; Toshiharu Marui; Yuji Saito; Shigeharu Yamagami; Tetsuya Hayashi; Masakatsu Hoshi

We demonstrate a SiC trench MOSFET with an integrated low Von unipolar heterojunction diode (MOSHJD). A region of the heterojunction diode (HJD) was fabricated in a trench with p+-type poly-crystalline silicon on an n--type epitaxial layer of 4H-SiC. The measured on-resistance (Ron) of the transistor action was 15 mΩcm2. The measured Von of the diode action was 2.2 V at a forward current density of 100 A/cm2. The fabrication process of the MOSHJD is simple. First, the trenches of the MOSFET region and the HJD region are formed simultaneously; then poly-crystalline silicon is deposited to form the gate electrode of the MOSFET region and the anode electrode of the HJD region at the same time.


Materials Science Forum | 2012

Novel Low VON Poly-Si/4H-SiC Heterojunction Diode Using Energy Barrier Height Control

Shigeharu Yamagami; Tetsuya Hayashi; Masakatsu Hoshi

We experimentally investigated a method of controlling the energy barrier height (ΦB) of polycrystalline silicon (poly-Si)/4H-SiC heterojunction diodes (HJDs) and conducted a numerical simulation of a novel low Von and low reverse recovery current diode using ΦB control. The ΦB of the HJD with arsenic-doped n+-poly-Si was 0.79 eV and that of the HJD with boron-doped p+-poly-Si was 1.59 eV. The ΦB can be controlled over a wide range by varying the dopant and ion implantation dose of poly-Si. A novel merged HJD (M-HJD) with two different ΦB values obtained by using ΦB control is also presented. The numerical simulation results show that the M-HJD reduces Von without increasing reverse leakage current at high reverse voltage.


Archive | 2007

Semiconductor device having a heterojunction diode and manufacturing method thereof

Tetsuya Hayashi; Masakatsu Hoshi; Yoshio Shimoida; Hideaki Tanaka; Shigeharu Yamagami


Archive | 2007

Method of manufacturing a semiconductor device and products made thereby

Tetsuya Hayashi; Masakatsu Hoshi; Hideaki Tanaka; Shigeharu Yamagami


Archive | 2007

Hetero junction semiconductor device

Yoshio Shimoida; Masakatsu Hoshi; Tetsuya Hayashi; Hideaki Tanaka; Shigeharu Yamagami


Archive | 1975

Semiconductor switch device

Yoshio Shimoida; Masakatsu Hoshi; Hideaki Tanaka; Tetsuya Hayashi; Toshiro Shinohara; Shigeharu Yamagami


Archive | 2008

Method of manufacturing semiconductor device and semiconductor device manufactured thereof

Shigeharu Yamagami; Masakatsu Hoshi; Tetsuya Hayashi; Hideaki Tanaka

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Hideaki Tanaka

National Institute of Advanced Industrial Science and Technology

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