Shihwa Lee

SGRT: a mobile GPU architecture for real-time ray tracing

Recently, with the increasing demand for photorealistic graphics and the rapid advances in desktop CPUs/GPUs, real-time ray tracing has attracted considerable attention. Unfortunately, ray tracing in the current mobile environment is very difficult because of inadequate computing power, memory bandwidth, and flexibility in mobile GPUs. In this paper, we present a novel mobile GPU architecture called SGRT (Samsung reconfigurable GPU based on Ray Tracing) in which a fast compact hardware accelerator and a flexible programmable shader are combined. SGRT has two key features: 1) an area-efficient parallel pipelined traversal unit; and 2) flexible and high-performance kernels for shading and ray generation. Simulation results show that SGRT is potentially a versatile graphics solution for future application processors as it provides a real-time ray tracing performance at full HD resolution that can compete with that of existing desktop GPU ray tracers. Our system is implemented on an FPGA platform, and mobile ray tracing is successfully demonstrated.

Seamless and Fast Panoramic Image Stitching

In this paper, a novel panoramic imaging method is presented which can compensate tone differences between images precisely by estimating ghost pixels in the overlap area. The method compensates the overlapped images bilaterally, then it prevents a panoramic image from getting darker or lighter as images are stitched. Therefore, the proposed method allows the overall panorama to keep the proper mid-tone, offering a high-speed panorama system with only software implementation in spite of its outstanding performance. Experimental results show that the proposed method can correct 95% serious corner cases taking less time than existing methods.

Real-time ray tracing on future mobile computing platform

In this work, we present a novel mobile computing platfom for mobile ray tracing in which a fast compact hardware accelerator and a flexible programmable shader are combined. Our platform has two key features: 1) an area-efficient parallel pipelined traversal unit; and 2) flexible and high-performance kernels for shading and ray generation. Simulation results show that our platform is potentially a versatile graphics solution for future application processors as it provides a real-time ray tracing performance at full HD resolution that can compete with that of existing desktop GPU ray tracers. Our system is implemented on an FPGA platform, and mobile ray tracing is successfully demonstrated.

A simple ghost-free exposure fusion for embedded HDR imaging

We propose a simple ghost-free exposure fusion algorithm in which three (over-, mid-, under-) exposures are input for fast embedded HDR imaging. Previous methods in this area require a complicated post-processing, such as morphological operations and large size kernel operations. To remove ghost artifacts successfully even with a low computing power, first of all an over-exposure input is set as a reference image, and non-ghostness probability is applied to acquire a ghost-free fusion weight. Through some experimental analysis, we show that such a reference image setting scheme makes it possible to skip the heavily time consuming post-processing.

A novel mobile GPU architecture based on ray tracing

Recently, with the increasing demand for photorealistic graphics and the rapid advances in desktop CPUs/GPUs, real-time ray tracing has attracted considerable attention. Unfortunately, ray tracing in the current mobile environment is difficult because of inadequate computing power, memory bandwidth, and flexibility in mobile GPUs. In this paper, we present a novel mobile GPU architecture called the SGRT (Samsung reconfigurable GPU based on Ray Tracing) with the following features: 1) a fast compact hardware engine that accelerates a traversal and intersection operation, 2) a flexible reconfigurable processor that supports software ray generation and shading, and 3) a parallelization framework that achieves scalable performance. Experimental results show that the SGRT can be a versatile graphics solution, as it supports compatible performance compared to desktop GPU ray tracers.

Energy efficient data transmission for ray tracing on mobile computing platform

In this paper, we focus the impact of a memory bandwidth limitation by analyzing the bandwidth consumption for ray tracing system and present an energy efficient data transmission method between processor and ray tracing hardware engine. For evaluation of our approach, we have implemented a prototype of ray tracing architecture using our approach on FPGA platform. According to our experiment result, our approach shows a 48% reduction of system memory bandwidth on average.

Programmable multimedia platform based on reconfigurable processor for 8K UHD TV

This paper introduces the worlds first programmable video-processing platform for the enhancement of the video quality of the 8K (7680 × 4320) Ultra High Definition (UHD) TV that operates at a maximum rate of 60 frames per second. To support the massive computational load and memory bandwidth of 8K video, several key features have been implemented in the proposed platform such as symmetric multi-cluster architecture for data partitioning, a ring-data path between the clusters to support data pipelining, on-the-fly processing architecture for the reduction of the DDR bandwidth, and flexible hardware accelerators that facilitate the computation of common kernels by video-qualityenhancement algorithms. In addition, within a context of continuously evolving and changing UHD-TV video algorithms, system flexibility is crucial to support new algorithms and enhance competitiveness. The programmability of the main core of the proposed platform the reconfigurable processor (RP) makes it possible to upgrade the algorithms even after the hardware design is fixed. The proposed platform was embedded into the System on Chip (SoC), and a new 8K UHD-TV model that features this programmable solution is expected to appear on the market in the near future.

Fixed cycle Huffman decoding instruction for multi-format decoder

A dedicated instruction for Huffman decoding being performed in a fixed cycle is proposed. To do this, Huffman table mapping algorithm is also proposed. It supports various types of Huffman code and optimum mapping table size can be set for the various configuration modes. Proposed instruction is applied to reconfigurable processor of VLIW/CGA architecture operating at up to 1GHz using 35nm CMOS technology and can decode a symbol in 5 cycles.

A fast low-light multi-image fusion with online image restoration

This paper presents a new low-light multi-frame fusion algorithm to get a bright and clear shot even under dark conditions. To this end, using multiple short-exposure images and one proper-exposure blurry image as an input, a new hierarchical block-wise temporal noise filtering is done. Finally, an online image restoration of the denoising result is conducted along with the blurry image input. Test results on real low-light scene show its effectiveness like fast processing speed and satisfactory visual quality.

Tile binning algorithm for vector graphics minimizing false overlap

In this paper, we present an efficient tile binning algorithm that reduces false overlap area for the Bezier curve. To do so, we propose a Multiple-Bounding Box (MBB) enclosing a Bezier curve with multiple bounding boxes. Experimental comparisons of MBB and legacy methods show that the proposed MBB method reduces 16~35% memory overhead. It also reduces 23~54% CPU latency overhead in a tile-based 2D graphics pipeline.