Shoji Kawahito

A CMOS image sensor with analog two-dimensional DCT-based compression circuits for one-chip cameras

This paper presents a CMOS image sensor with on-chip compression using an analog two-dimensional discrete cosine transform (2-D DCT) processor and a variable quantization level analog-to-digital converter (ADC). The analog 2-D DCT processor is essentially suitable for the on-sensor image compression, since the analog image sensor signal can be directly processed. The small and low-power nature of the analog design allows us to achieve low-power, low-cost, one-chip digital video cameras. The 8/spl times/8-point analog 2-D DCT processor is designed with fully differential switched-capacitor circuits to obtain sufficient precision for video compression purposes. An imager array has a dedicated eight-channel parallel readout scheme for direct encoding with the analog 2-D DCT processor. The variable level quantization after the 2-D DCT can be performed by the ADC at the same time. A prototype CMOS image sensor integrating these core circuits for compression is implemented based on triple-metal double-polysilicon 0.35-/spl mu/m CMOS technology. Image encoding using the implemented analog 2-D DCT processor to the image captured by the sensor is successfully performed. The maximum peak signal-to-noise ratio (PSNR) is 36.7 dB.

An integrated micro fluxgate magnetic sensor

Abstract This paper presents an integrated micro fluxgate magnetic sensor with planar fluxgate sensing elements and on-chip sensor interface circuits based on silicon integration technology. To simplify the integration process, we developed a noble sensing element with two-layer spiral coils and permalloy thin films at the top layer. The sensor interface circuits have been fabricated with the standard n-channel E/D (enhancement/ depletion) MOS process technology, and include the driver circuits for the periodic excitation of the core through the excitation coil and signal-processing circuits for the pick-up coil output based on second-harmonic detection. The fabricated planar sensing element has a magnetic sensitivity of about 73 V T −1 at 1MHz excitation frequency and 150 mA p-p driver current. The magnetic sensitivity of the integrated fluxgate sensor is about 90 V T −1 at 610 kHz excitation frequency and 110 mA p-p driver current.

High-resolution micro-fluxgate sensing elements using closely coupled coil structures

Abstract This paper describes high-resolution micro-fluxgate magnetic sensing elements using magnetic thin films and closely coupled excitation and pick-up coils based on a solenoid-shaped coil structure. In order to improve the sensitivity of the sensing element, the optimal coupling structure between excitation and pick-up coils, and the formation method of permalloy magnetic films are investigated. The closely coupled coil structure allows the magnetic core to be excited in an optimal condition with reduced excitation current. The addition of indium to the permalloy plating bath greatly reduces the degradation of the magnetic core due to the thermal treatment process. The sensitivity of the fabricated sensing element is measured to be 2700 VT −1 at an excitation frequency of 3 MHz. The noise level, or resolution in d.c. to 10 Hz bandwidth is measured to be about 40 nT p−p .

Multiple-valued radix-2 signed-digit arithmetic circuits for high-performance VLSI systems

VLSI-oriented multiple-valued current-mode MOS arithmetic circuits using radix-2 signed-digit number representations are proposed. A prototype adder chip is implemented with 10- mu m CMOS technology to confirm the principle of operation. A multiplication scheme using four-input current-mode wired summations for realizing a high-speed small-size multiplier is presented. The 32*32-b multiplier is composed of 18800 transistors and required fewer interconnections. The multiply time is estimated to be 45 ns by SPICE simulation in 2- mu m CMOS technology. It is shown that the technology is also potentially effective for the reduction of the data-bus area in VLSI. >

A 2D CMOS microfluxgate sensor system for digital detection of weak magnetic fields

This paper presents a CMOS two-dimensional (2-D) vector magnetic sensor system integrating two planar microfluxgate sensors and the complete electronics for sensor excitation and signal readout. The system is based on an industrial 0.8-/spl mu/m double-poly, double-metal CMOS technology with ferromagnetic NiFeMo cores added in a simple postprocessing sequence. The fluxgate sensors are embedded in a /spl Sigma//spl Delta/ analog-to-digital converter for a stable and precise digital detection of weak magnetic fields. A cascaded /spl Sigma//spl Delta/ modulator topology is utilized to obtain second-order noise shaping and to suppress pattern noise. Within the range of /spl plusmn/50 /spl mu/T, the system nonlinearity is less than 1.5 /spl mu/T. The angular resolution as a 2D vector sensor is less than 4/spl deg/ for a measured magnetic induction of 50 /spl mu/T. This makes the 2-D microfluxgate magnetometer suitable for use as fully integrated electronic compass.

High-speed area-efficient multiplier design using multiple-valued current-mode circuits

Presents a very-large-scale-integration (VLSI)-oriented high-speed multiplier design method based on carry-propagation-free addition trees and a circuit technique, so-called multiple-valued current-mode (MVCM) circuits. The carry-propagation-free addition method uses a redundant digit set such as /spl lcub/0,1,2,3/spl rcub/ and /spl lcub/0,1,2,3,4/spl rcub/. The number representations using such redundant digit sets are called redundant positive-digit number representations. The carry-propagation-free addition is written by three steps, and the adder can be designed directly and efficiently from the algorithm using MVCM circuits. The designed multiplier internally using the MVCM parallel adder with the digit set /spl lcub/0,1,2,3/spl rcub/ in radix 2 has attractive features on speed, regularity of the structure, and reduced complexities of active elements and interconnections. A prototype CMOS integrated circuit of the MVCM parallel adder has been implemented, and its stable operation has been confirmed. Other possible schemes of multipliers with redundant digit sets using MVCM technology are discussed. >

A fluxgate magnetic sensor with micro-solenoids and electroplated permalloy cores

Abstract In this paper, a fluxgate magnetic sensor with silicon micro-technology is presented. The sensor is composed of micro-structured solenoids for the excitation and pick-up coils and permalloy cores formed by electropolating. This device is for a sensing element of the integrated silicon magnetic sensor with high sensitivity and high resolution. Two types of core structures have been fabricated. One is a rod-core sensor based on micromachining technology by using anisotropic etching for the deep groove formation, direct electron-beam lithography for patterning the metal wires on the groove, and selective electroplating for the rod-shaped permalloy core formation in the groove. The other is a thin-film core sensor made by using a similar but simpler process without the groove formation. Relatively high sensitivity and low-offset characteristics have been achieved compared with those of the conventional silicon magnetic sensors.

CMOS class-AB current mirrors for precision current-mode analog-signal-processing elements

CMOS class-AB current mirrors for high-precision current-mode analog-signal-processing elements are described. The class-AB configuration allows us to reduce the offset error caused by device mismatch, the nonlinearity distortion, and power consumption. The offset error due to the device mismatch is greatly reduced by the reduction of the bias current. The class-AB current-mirror has less sensitivity to the mismatch since the bias current relative to the signal current can be reduced. The excellent precision is confirmed by Monte Carlo simulation and SPICE based on 1 /spl mu/m CMOS LSI parameters.

High temperature pressure sensor using double SOIstructure with two Al2O3 films

Abstract A high temperature pressure sensor using double silicon-on-insulator (SOI) structures stacked by double heteroepitaxial growth, Si//δ-Al2O3//Si//δ-Al2O3//Si-substrate structures, has been developed. This sensor consists of a thin rectangular diaphragm and a single-elementfour-terminal piezoresistor produced by micromachininh technology with a standard IC process. The diagphragm size is 360X1080 μm and 5 μm in thickness. The diagphragm thickness was precisely controlled by the Al2O3 films of the first SOI layer. A second Al2O3 film on the first SOI layer was used as a dielectrically isolated single-element four-terminal piezoresistor that was placed at the center of the diagphragm. The pressure sensitivity was 6.5 mV/V kgf/cm2 full scale pressure range. The thermal sensitivity shift was less than 2.7% in the temperature range from 20 to 300 °C. These values are acceptable for many applications, and indicate that the sensor can be operated stably up to temperatures as high as 300 °C.

A compressed digital output CMOS image sensor with analog 2-D DCT processors and ADC/quantizer

Progress in CMOS-based image sensors is creating opportunities for a low-cost, low-power one-chip video camera with digitizing, signal processing and image compression. Such a smart camera head acquires compressed digital moving pictures directly into portable multimedia computers. Video encoders using a moving picture coding standard such as MPEG and H.26x are not always suitable for integration of image encoding on the image sensor, because of the complexity and the power dissipation. On-sensor image compression such as a CCD image sensor for lossless image compression and a CMOS image sensor with pixel-level interframe coding are reported. A one-chip digital camera with on-sensor video compression is shown in the block diagram. The chip contains a 128/spl times/128-pixel sensor, 8-channel parallel read-out circuits, an analog 2-dimensional discrete cosine transform (2D DCT) processor and a variable quantization-level ADC (ADC/Q).