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Dive into the research topics where Shoji Muramatsu is active.

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Featured researches published by Shoji Muramatsu.


Information Visualization | 2002

Multitype lane markers recognition using local edge direction

Yuuji Otsuka; Shoji Muramatsu; Hiroshi Takenaga; Yoshiki Kobayashi; T. Monj

This paper proposes a lane recognition algorithm which is able to find lane markers regardless of their types such as white lines, raised pavement markers, etc. The algorithm utilizes the characteristics that the lane markers converge to the focus of expansion and the lane markers have edge points towards the focus of expansion. Many edge points toward the focus of expansion are located on the lane boundaries where the lane markers exist. Hence, the algorithm uses only the edge points whose direction is towards the focus of expansion. Each edge direction is computed by only near-neighbor elements rather than continuous line segments in order to detect lane markers even if their shapes are not continuous lines. In the case of the raised pavement markers, experimental results show that the average processing time is under 100 ms and the recognition rate is over 96%.


Systems and Computers in Japan | 2003

Strategy of high‐speed template matching and its optimization by using GA

Shoji Muramatsu; Yuji Otsuka; Yoshiki Kobayashi; Eiji Shimizu

The template matching technique is now applied to various image processing systems, and there is an increasing demand for applications of template matching based on the normalized correlation coefficient, which is robust to variations of illumination. In order to use techniques based on the normalized correlation coefficient in practical application problems, however, high-speed calculation of the normalized correlation coefficient is required. The purpose of this paper is to increase speed by shrinking the image to be processed. However, stable template matching requires that the features of the image to be processed be retained in the shrunken image. For this purpose, the shrinkage ratio must be determined reasonably considering the properties of the template image as well as the search image. In order to set the shrinkage ratio effectively it is also necessary to preprocess the image so that the features are enhanced. In this study, the combination of the shrinkage ratio and preprocessing, which may depend on the individual image, is optimized by using a genetic algorithm. For evaluation, the proposed method is applied to a real system, and the effectiveness of the method is verified in terms of the practical processing speed and stability.


international conference on pattern recognition | 2008

Incoherent motion detection using a time-series Gram matrix feature

Masato Kazui; Masanori Miyoshi; Shoji Muramatsu; Hironobu Fujiyoshi

This paper proposes a new method for incoherent motion recognition from video sequences. We use time-series spatio-temporal intensity gradients within a space-time patch. Using a global space-time patch, we found that the gradient feature allows us to distinguish an incoherent motion from a coherent motion without segmentation. Furthermore the algorithm can run in real time even on an embedded device. In this paper, we verify motion recognition performance for actions which we consider coherent (walk/run) and incoherent (turn/squat/inverse walk). To identify the multiple motion classes, we use linear discriminant analysis and the KNN method. As a result, Our method can distinguish multiple-class motion patterns with a detection rate of about 80%. Also the detection rule of incoherent motions is 100% with a false positive rate of less than 10%.


electronic imaging | 2002

Development of image processing LSI SuperVchip for real-time vision systems

Shoji Muramatsu; Yoshiki Kobayashi; Yasuo Otsuka; Hiroshi Shojima; Takayuki Tsutsumi; Toshihiko Imai; Shigeyoshi Yamada

A new image processing LSI SuperVchip with high-performance computing power has been developed. The SuperVchip has powerful capability for vision systems as follows: 1. General image processing by 3x3, 5x5, 7x7 kernel for high speed filtering function. 2. 16-parallel gray search engine units for robust template matching. 3. 49 block matching Pes to calculate the summation of the absolution difference in parallel for stereo vision function. 4. A color extraction unit for color object recognition. The SuperVchip also has peripheral function of vision systems, such as video interface, PCI extended interface, RISC engine interface and image memory controller on a chip. Therefore, small and high performance vision systems are realized via SuperVchip. In this paper, the above specific circuits are presented, and an architecture of a vision device equipped with SuperVchip and its performance are also described.


asia and south pacific design automation conference | 2010

SOC for car navigation system with a 55.3GOPS image recognition engine

Hiroyuki Hamasaki; Yasuhiko Hoshi; Atsushi Nakamura; Akihiro Yamamoto; Hideaki Kido; Shoji Muramatsu

This paper introduces the System on a Chip (SOC) equipped with dual RISC processors, an image recognition engine operating with up to 55.3 GOPS, multiple accelerators and peripherals for car navigation systems. The SoC has high performance with respect to image recognition applications which are installed in advanced vehicles as well as navigation function such as graphics operating at the same time. Furthermore we have developed the SoC in order to meet automotive specifications including cost and size. We report practical application which is for the pedestrian detection to demonstrate our SoC capability. We accelerate the application with combination of the RISC processor and image recognition engine.


ieee hot chips symposium | 2009

SoC for car navigation systems with a 53.3 GOPS image recognition engine

Hideaki Kido; Shoji Muramatsu; Yasuhiko Hoshi; Hiroyuki Hamasaki; Atsuhi Nakamura; Akihiro Yamamoto

SH-Navi3 embeds ■ High performance dual RISC processors (1920 MIPS) ■ 2D/3D graphic accelerators ■ Image recognition engine — High-speed processing (up to 53.3GOPS): parallel processing + pipeline architecture + function specific accelerator — Bus traffic reduction & Line programmability: PIPE architecture


symposium on vlsi circuits | 2015

Embedded image recognition systems for advanced safety vehicles

Masayuki Takemura; Takeshi Shima; Shoji Muramatsu

Driver safety continues to be improved by advances in active safety technologies. In various advanced countries, regulations and New Car Assessment Program soon will require Autonomous Emergency Braking (AEB) and Lane Departure Warning (LDW). The market of recognition systems for active safety is continually expanding, in which a key element is image recognition technology for advanced safety vehicles. We have been developing core image recognition technologies for autonomous vehicles. These core technologies can be divided into 3 categories which are front, rear-view, and SurroundEye camera systems. First, we describe the SurroundEye view monitoring system using 4 cameras for parking assistance. Second, we describe the rear-view camera sensing system which is used for both rear-view monitoring and active safety technologies. Finally, we introduce active safety technologies using a front stereo camera. These systems require real-time processing, and robust sensing on outdoor environments.


electronic imaging | 2008

Rapid object candidate detection using increment sign correlation

Masato Kazui; Masaya Itoh; Shoji Muramatsu

We develop a rapid object-candidates detector using Increment Sign Correlation (ISC). Our method aims to detect candidates of objects such as people or vehicles in real time using ISC and a simple shape model. Our method is similar to Generalized Hough Transform (GHT). However we modify its voting process. We use ISC for detecting object candidates instead of the shape voting done by GHT. ISC is robust against shading and low image contrast due to lighting changes because Increment Sign (IS) is insensitive to a perturbation of direction of intensity gradient. The computational cost of IS is lower than that of the gradient also. From the results of our experiment, our detector can run with a 320×240 pixel image within 32 milliseconds on a Pentium 4 processor at 2.8 GHz. Given the initial template size of 10×20 pixels, the number of candidates decreases from 170,196 sub-windows in a 320×240 pixel image to 400 at most with the miss rate of 0.2 %. The detection rate is enough for more precise detectors which need to use richer image features. The experimental results using real image sequences are reported.


Archive | 2008

Image processing system and vehicle control system

Yuji Otsuka; Hiroshi Takenaga; Shoji Muramatsu; Tatsuhiko Monji; Isao Furusawa


Archive | 2010

Road shape recognition device

Mirai Higuchi; Morihiko Sakano; Takeshi Shima; Shoji Muramatsu; Tatsuhiko Monji

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