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Dive into the research topics where Shoubhik Gupta is active.

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Featured researches published by Shoubhik Gupta.


Advanced Robotics | 2015

New materials and advances in making electronic skin for interactive robots

Nivasan Yogeswaran; Wenting Dang; William Taube Navaraj; Dhayalan Shakthivel; Saleem Khan; Emre O. Polat; Shoubhik Gupta; Hadi Heidari; Mohsen Kaboli; Leandro Lorenzelli; Gordon Cheng; Ravinder Dahiya

Flexible electronics has huge potential to bring revolution in robotics and prosthetics as well as to bring about the next big evolution in electronics industry. In robotics and related applications, it is expected to revolutionise the way with which machines interact with humans, real-world objects and the environment. For example, the conformable electronic or tactile skin on robot’s body, enabled by advances in flexible electronics, will allow safe robotic interaction during physical contact of robot with various objects. Developing a conformable, bendable and stretchable electronic system requires distributing electronics over large non-planar surfaces and movable components. The current research focus in this direction is marked by the use of novel materials or by the smart engineering of the traditional materials to develop new sensors, electronics on substrates that can be wrapped around curved surfaces. Attempts are being made to achieve flexibility/stretchability in e-skin while retaining a reliable operation. This review provides insight into various materials that have been used in the development of flexible electronics primarily for e-skin applications.


IEEE Transactions on Electron Devices | 2017

Modeling of CMOS Devices and Circuits on Flexible Ultrathin Chips

Anastasios Vilouras; Hadi Heidari; Shoubhik Gupta; Ravinder Dahiya

The field of flexible electronics is rapidly evolving. The ultrathin chips are being used to address the high-performance requirements of many applications. However, simulation and prediction of changes in response of device/circuit due to bending induced stress remains a challenge as of lack of suitable compact models. This makes circuit designing for bendable electronics a difficult task. This paper presents advances in this direction, through compressive and tensile stress studies on transistors and simple circuits such as inverters with different channel lengths and orientations of transistors on ultrathin chips. Different designs of devices and circuits in a standard CMOS 0.18-


IEEE Transactions on Circuits and Systems | 2016

Device Modelling for Bendable Piezoelectric FET-Based Touch Sensing System

Shoubhik Gupta; Hadi Heidari; Anastasios Vilouras; Leandro Lorenzelli; Ravinder Dahiya

\mu \text{m}


international symposium on circuits and systems | 2016

Towards bendable piezoelectric oxide semiconductor field effect transistor based touch sensor

Shoubhik Gupta; Hadi Heidari; Leandro Lorenzelli; Ravinder Dahiya

technology were fabricated in two separated chips. The two fabricated chips were thinned down to


Journal of Semiconductors | 2015

Adder design using a 5-input majority gate in a novel “multilayer gate design paradigm” for quantum dot cellular automata circuits

Rohit Kumar; Bahniman Ghosh; Shoubhik Gupta

20~\mu \text{m}


Journal of Semiconductors | 2015

Compact analytical model of double gate junction-less field effect transistor comprising quantum-mechanical effect

Shoubhik Gupta; Bahniman Ghosh; Shiromani Balmukund Rahi

using standard dicing-before-grinding technique steps followed by post-CMOS processing to obtain sufficient bendability (20-mm bending radius, or 0.05% nominal strain). Electrical characterization was performed by packaging the thinned chip on a flexible substrate. Experimental results show change of carrier mobilities in respective transistors, and switching threshold voltage of the inverters during different bending conditions (maximum percentage change of 2% for compressive and 4% for tensile stress). To simulate these changes, a compact model, which is a combination of mathematical equations and extracted parameters from BSIM4, has been developed in Verilog-A and compiled into Cadence Virtuoso environment. The proposed model predicts the mobility variations and threshold voltage in compressive and tensile bending stress conditions and orientations, and shows an agreement with the experimental measurements (1% for compressive and 0.6% for tensile stress mismatch).


npj Flexible Electronics | 2018

Ultra-thin chips for high-performance flexible electronics

Shoubhik Gupta; William Taube Navaraj; Leandro Lorenzelli; Ravinder Dahiya

Flexible electronics is rapidly evolving towards devices and circuits to enable numerous new applications. The high-performance, in terms of response speed, uniformity and reliability, remains a sticking point. The potential solutions for high-performance related challenges bring us back to the time-tested silicon based electronics. However, the changes in the response of silicon based devices due to bending related stresses is a concern, especially because there are no suitable models to predict this behavior. This also makes the circuit design a difficult task. This paper reports advances in this direction, through our research on bendable piezoelectric oxide semiconductor field effect transistor (POSFET) based touch sensors. The analytical model of POSFET, complimented with Verilog- A model, is presented to describe the device behavior under normal force in planar and stressed conditions. Further, dynamic readout circuit compensation of POSFET devices have been analyzed and compared with similar arrangement to reduce the piezoresistive effect under tensile and compressive stresses. This approach introduces a first step towards the systematic modeling of stress induced changes in device response. This systematic study will help realize high-performance bendable microsystems with integrated sensors and readout circuitry on ultra-thin chips (UTCs) needed in various applications, in particular, the electronic skin (e-skin).


Applied Physics Letters | 2018

Piezoelectric graphene field effect transistor pressure sensors for tactile sensing

Nivasan Yogeswaran; William Taube Navaraj; Shoubhik Gupta; Fengyuan Liu; Vincenzo Vinciguerra; Leandro Lorenzelli; Ravinder Dahiya

This paper reports recent advances related to the piezoelectric oxide semiconductor field effect transistor (POS-FET) based touch sensing system research. We reported in past, the POSFETs with basic electronics realized on planar silicon substrates using CMOS technology. However, the planar POSFETs could not be used on 3D or curved surfaces such as the fingertip of a robot. To overcome this challenge we are now investigating the ultra-thin-chip approach for obtaining bendable POSFETs tactile sensing array. This paper presents this approach towards obtaining bendable POSFETs. Furthermore, for the first time the theoretical behavior of POSFETs devices are examined by combining the piezoelectric capacitor model proposed and the physics of underlying metal-oxide-semiconductor (MOS) FETs in the linear and saturation regions. The device characteristic equations are simulated using MATLAB and comparable matching is achieved with the experimental measurements. The model result gives a unique insight into geometrical and material properties of piezoelectric polymer on the electrical properties of transistor for flexible electronics applications. Using this model, the Spice simulation of POSFET device in a single-ended op-amp configuration, and the effect of chip thickness on deflection are presented.


international symposium on industrial electronics | 2017

Device modelling of silicon based high-performance flexible electronics

Shoubhik Gupta; Anastasios Vilouras; Hadi Heidari; Ravinder Dahiya

This paper proposes a novel design paradigm for circuits designed in quantum dot cellular automata (QCA) technology. Previously reported QCA circuits in the literature have generally been designed in a single layer which is the main logical block in which the inverter and majority gate are on the base layer, except for the parts where multilayer wire crossing was used. In this paper the concept of multilayer wire crossing has been extended to design logic gates in multilayers. Using a 5-input majority gate in a multilayer, a 1-bit and 2-bit adder have been designed in the proposed multilayer gate design paradigm. A comparison has been made with some adders reported previously in the literature and it has been shown that circuits designed in the proposed design paradigm are much more efficient in terms of area, the requirement of QCA cells in the design and the input–output delay of the circuit. Over all, the availability of one additional spatial dimension makes the design process much more flexible and there is scope for the customizability of logic gate designs to make the circuit compact.


ieee sensors | 2017

Multifunctional flexible PVDF-TrFE/BaTiO 3 based tactile sensor for touch and temperature monitoring

Shoubhik Gupta; Leandro Lorenzelli; Ravinder Dahiya

We investigate the quantum-mechanical effects on the electrical properties of the double-gate junction-less field effect transistors. The quantum-mechanical effect, or carrier energy-quantization effects on the threshold voltage, of DG-JLFET are analytically modeled and incorporated in the Duarte et al. model and then verified by TCAD simulation.

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Bahniman Ghosh

University of Texas at Austin

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Shiromani Balmukund Rahi

Indian Institute of Technology Kanpur

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