Shunzo Yamashita

A 15 -- 15 mm, 1 μA, reliable sensor-net module: enabling application-specific nodes

An ultra-small, low-power sensor-net module called ZN1 is developed. ZN1 integrates MCU, ZigBee RF into an ultra-small 15times15-mm module with an ultra-low standby current less than 1 muA. The and highly reliable operation for more than 15 years of the ZN1 enable low-cost practical application-specific sensor nodes for HVAC, structure monitoring, office management, security, medicine, and healthcare. We describe architecture and technologies for developing the ZN1 module. Moreover, we demonstrate two applications that we developed simultaneously: food sanitation and home healthcare. We also show results of the ZN1 module evaluation and discuss reliability of the ZN1

Multi-level pass-transistor logic for low-power ULSIs

Multi-level pass-transistor logic (MPL) removes the redundancy in conventional single-level pass-transistor circuits to improve both power and delay. MPL is synthesizable based on the multi-level binary decision diagram, a new logic representation, and it has the potential to replace CMOS in any synthesized control block of an MPU. Overall improvement in the product of power, delay, and area of 42% over CMOS is confirmed in actual microprocessor benchmark tests.

Life Microscope: Continuous daily-activity recording system with tiny wireless sensor

A continuous daily-activity recording system called ldquolife microscoperdquo is developed. Acceleration waveform data is acquired without any data loss for a week with a 150-mAh battery. This is made possible by two novel techniques: ldquocool senserdquo and ldquosafe packetrdquo. Cool sense reduces power by 98% during continuous sensing at frequencies such as 20 Hz by using a millisecond time-scale sleep. Safe packet ensures lossless data acquisition with low-cost storage and efficient data compression in wireless environments with interference. In our experiment using the life microscope system, we recorded lossless activity data of 20 participants for more than 4 months.

An integrated, low power localization system for sensor networks

Localization (a.k.a. locationing) is a central concern for ubiquitous self-configuring sensor networks. In this paper the implementation of a distributed, least-squares-based localization algorithm is presented. Low power and energy dissipation are key requirements for sensor networks. As part of the sensor network, the localization system must also conform to these requirements. An ultra-low-power and dedicated hardware implementation of the localization system is therefore presented. The cost of fixed-point implementation is also investigated. The design is implemented in a 0.13 /spl mu/ CMOS process. It dissipates 1.7 mW of active power and 0.122 J/op of active energy with a silicon area of 0.55 mm/sup 2/. The mean calculated location error due to fixed-point implementation is shown to be 6%.

RTL morphing: making IP-reuse work in system-on-a-chip designs

The proposed RTL morphing enables true IP-reuse design through flexible control of the RTL structure under the changes in performance requirements or delay constraints. This flexible RTL restructuring is provided by a new path-depth controlling method, which can optimize the depth of any path by changing the if-then-else nesting order of a basic logic unit (called a decision unit). The use of RTL morphing reduces the design period of a time-to-market pressured SoC of 4M transistors by two months with 18% operating frequency improvement.

A 15/spl times/15 mm, 1 /spl mu/A, reliable sensor-net module: enabling application-specific nodes

Radiographic apparatus includes indicium means for indelibly imprinting computerized axial tomographs with identification data which relates to the position of the tomographic slice in relation to a fixed datum position such as the top of a patients head. The indicium comprises a member having characteristically varying radiopacity which is positioned in the vicinity of the radiographic slice so as to be scanned by the exploring radiation and is fixedly secured in relation to the datum position.

Hole filling: a novel delay reduction technique using selector logic

The proposed hole filling, contrary to the conventional method, makes use of paths with delay margins and provides a high-speed circuit by equalizing the delay margin of all paths. To achieve this delay reduction technique, we introduce a new concept named for the hole, which gives readily-usable information about the delay margins of a path. We also develop a new logic transformation method based on selector logic, which enables very flexible control of the path depth of a circuit. The benchmark test for a 32/64 bit adder and subtractor shows that hole filling reduces delay by about 50% without any area increase, compared to a conventional synthesis tool. Moreover, it is also confirmed that it is possible to reduce delay by about 10% for the logic (/spl sim/10 K gates) of an actual microprocessor.

Practical application of ZigBee-based life recording and management system on mobile WiMAX network in Azumino city

In this paper, a ZigBee-based sensor network is realized and evaluations are carried out in order to clarify the fundamental performance of this sensor network. Life recording and management system is introduced as an example of ZigBee-based sensor networks, and the system is introduced into mobile WiMAX network in Azumino city in order to solve some medical problems in local cities. The following evaluations are carried out: first one is an evaluation of the effect on communication time by interference of same frequency band signal, second one is a comparison of power of ZigBee signal with power of wireless LAN signal and third one is an evaluation of relationship between throughput and distance. Moreover, in this paper, examples of recorded data are shown, and the effectiveness of this system is clarified.