Sidhartha Dash
Siksha O Anusandhan University
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Publication
Featured researches published by Sidhartha Dash.
Advances in Natural Sciences: Nanoscience and Nanotechnology | 2015
P. Kumari; Sidhartha Dash; Guru Prasad Mishra
This paper presents both the analytical and simulation study of analog and RF performance for single gate semiconductor on insulator tunnel field effect transistor in an extensive manner. Here 2D drain current model has been developed using initial and final tunneling length of band-to-band process. The investigation is further extended to the quantitative and comprehensive analysis of analog parameters such as surface potential, electric field, tunneling path, and transfer characteristics of the device. The impact of scaling of gate oxide thickness and silicon body thickness on the electrostatic and RF performance of the device is discussed. The analytical model results are validated with TCAD sentaurus device simulation results.
international conference on computing electronics and electrical technologies | 2012
Sidhartha Dash; Mihir Narayan Mohanty
Outliers play an important role in adaptive systems. The rank-based Wilcoxon approach to linear regression problems in statistics are usually insensitive to outliers. This paper aim towards the Wilcoxon approach in Least Mean Square Algorithm. Also it has been applied for System Identification problem with Gaussian noise. The traditional LMS algorithm is generally well suited for identification of linear static systems where the probability of addition of outliers to data input is minimal. The investigation regarding the performance the performance analysis, error curve and deviation in presence of outliers are presented. Simulation results show that the Wilcoxon norm based LMS have better robustness against outliers.
Advances in Natural Sciences: Nanoscience and Nanotechnology | 2016
Biswajit Jena; B.S. Ramkrishna; Sidhartha Dash; Guru Prasad Mishra
In this paper a new conical surrounding gate metal-oxide-semiconductor field effect transistor (MOSFET) with triple-material gate has been proposed and verified using TCAD device simulator from Synopsis. The electrostatic performance of conical model with different tapering ratios is extensively investigated and compared with that of cylindrical model (tapering ratio TR = 1). The present model exhibits improved electrostatic behavior for an optimized tapering ratio of 0.98 as compared to the conventional cylindrical model. The results reveal that the triple-material conical model provides better ON current performance, transconductance and reduced threshold voltage. On the contrary the single-material conical model exhibits maximum / ratio, minimum OFF current and reduced subthreshold swing (SS) in comparison to other models. Thus, the conical model with optimized tapering ratio can be a possible replacement of cylindrical model for low-power and high speed application.
Advances in Natural Sciences: Nanoscience and Nanotechnology | 2016
Sidhartha Dash; Guru Prasad Mishra
In the proposed work an analytical model of a p-channel dual material gate all around tunnel FET (DMGAA-TFET) is presented and its performance is compared with the conventional GAA-TFET. The electrostatic potential profile of the model is obtained using 2-D Laplaces solution in the cylindrical coordinate system. A quantitative study of the drain current has been carried out using electric field in the z-axis and tunneling path. However the potential and current analysis is prolonged to different combinations of gate length in the DMGAA-TFET model. The results show an improvement in drain current and subthreshold swing as compared to GAA-TFET, which makes this model a potential replacement for low power application. Also the effect of scaling of the gate oxide thickness and cylindrical pillar diameter on the surface potential, initial tunneling point and tunneling current are analyzed.
Archive | 2013
Sidhartha Dash; Santanu Sahoo; Mihir Narayan Mohanty
Wireless Communication systems require the most efficient techniques for reception of error-less data with high data rate. The channels introduce both linear and non-linear distortions. ISI plays a major role in this field. Also these channels contaminate the received sequence with random fluctuation. In this paper, an adaptive algorithm based on FLANN has been developed for channel equalization with analysis of MSE. The FLANN is developed with LMS technique as well as sign regressor based LMS technique and the results are compared. Also the result is compared with the standard adaptive LMS algorithm. The signed FLANN based model shows better performance as compared to LMS based FLANN model.
2016 International Conference on Emerging Trends in Electrical Electronics & Sustainable Energy Systems (ICETEESES) | 2016
S. Sahoo; Subhrasmita Panda; Guru Prasad Mishra; Sidhartha Dash
This paper presents a 2D analytical model for symmetric double gate Tunnel Field Effect transistor (DG-TFET) based on tunneling path in the channel. The potential profile is obtained by solving 2D Poissons equation in the rectangular coordinate system. The drain current is extracted by integrating the band to band tunneling generation rate, initial and final tunneling length. The primary focus is on initial tunneling length as it directly influence the drain current amplitude of the device. The DG-TFET shows ON-current improvement as compared with SG-TFET. The validation of analytical results with simulated results is done by TCAD device simulator.
Iet Circuits Devices & Systems | 2018
Subhrasmita Panda; Sidhartha Dash; Guru Prasad Mishra
In this study, an analytical model for linearly modulated work-function-based delta-doped single-gate tunnel field-effect transistor (TFET) has been developed to improve the analogue performance. The impact of delta-doped layer and linearly modulated metal gate on different analogue parameters has been investigated extensively. The insertion of heavily doped delta layer in the source region improves ON current and current switching ratio performance significantly as compared to conventional TFET. Similarly, the presence of spatially work-function modulated metal gate reduces subthreshold swing and improves I 60 performance. The distance of the delta layer from the source-channel interface is optimised to 3 nm to maximise efficiency. The proposed model exhibits much improved analogue performance as compared to conventional TFET and delta-doped TFET. Thus, the model can be viewed as one of the potential replacements for metal-oxide-semiconductor field-effect transistors in ultra-low-power applications. However, the precision of present model is corroborated by using the two-dimensional TCAD Sentaurus simulator.
2017 Devices for Integrated Circuit (DevIC) | 2017
Biswajit Jena; Sidhartha Dash; Guru Prasad Mishra
The unique design along with greater accuracy in device performance has made cylindrical surrounding gate MOSFET (CSGM) a cutting edge device in the present VLSI technology. Due to its cylindrical geometry, this device provides higher packing density and higher scaling possibilities. The fabrication process of a surface channel device with proper threshold voltage (Vth) directly depends upon the work function of the gate electrode. By keeping it in mind, a work function engineering based metal gate with continuous mole fraction variation along the z-axis in a cylindrical surrounding gate MOSFET (WMCSGM) is introduced. The present WMCSGM model exhibits improved RF performance as compared to CSGM model. The RF performance of the model is extensively investigated in terms of different figure of merits such as cut-off frequency, transconductance and gate capacitance.
ieee power communication and information technology conference | 2015
Sidhartha Dash; Biswajit Jena; P. Kumari; Guru Prasad Mishra
This work presents both the analytical and simulation study of electrostatic performance for high-k dielectric (Si3N4) based Nanowire Tunnel FET. The analytical drain current for the model has been developed using minimum tunneling length and lateral electric field. The analysis is extended to measure the electrostatic parameters such as surface potential, electric field, and minimum tunneling distance and the results are compared with conventional low-k dielectric (SiO2) based model. It has been revealed that the high-k dielectric improves the drain current and reduces the threshold potential in the ON-condition. But the device produces large leakage current at OFF-state. The compared results have been authenticated using TCAD Sentaurus device simulator.
Archive | 2013
Sidhartha Dash; Mihir Narayan Mohanty
Non-stationary random signals exhibit time-dependent characteristics and require proper models and corresponding identification methods. The focus is on identification method. We study system identification of the non-stationary parameters in this task. In this paper, the problem of non-causal identification of non-stationary, linear stochastic systems has been considered. A robust system identification approach adapted to chirp signals is proposed. An asymptotically unbiased estimate for the system’s transfer function is analyzed. We show that compared to a competing non-stationarity based method, a significantly smaller error variance is achieved and generally shorter observation intervals are required. The adaptive method used here, is Wilcoxon approach based. Also the comparison have been done with Sign WLMS and Sign sign WLMS methods as the modified technique. In case of a time-varying system, faster convergence and higher reliability of the system identification are obtained. The results confirm the advantages of proposed approach. The resulting parallel estimation scheme automatically adjusts its smoothing parameters to the unknown, and possibly time-varying, rate of non-stationarity of the identified system.