Sifen Luo

A monolithic Si PCS-CDMA power amplifier with 30% PAE at 1.9 GHz using a novel biasing scheme

A monolithic Si personal-communication system-CDMA power amplifier (PA) capable of delivering 28.2-dBm output power with 30% power-added efficiency and -45-dBc adjacent-channel-power ratio at 1.9 GHz and 3.6-V supply voltage is presented for the first time in this paper. The PA implemented in a 30-GHz BiCMOS process incorporates a novel impedance-controllable biasing scheme to control the class of operation and bias impedance of the output stage. Both simulated and measured results are presented for comparison.

Bias boosting technique for a 1.9 GHz class AB RF amplifier

A bias boosting technique for a 3.2V, 1.9GHz Class AB RF amplifier designed in a 30GHz BiCMOS process is presented in this paper. In a Class AB amplifier, the average current drawn from the supply depends on the input signal level. As the output power increases so does the average currents in both the emitter and the base of the power transistor. The increased average current causes an increased voltage drop in the biasing circuitry and the ballast resistor. This reduces the conduction angle in the amplifier, pushing it deep into Class B and even Class C operation, reducing the maximum output power by 25%. To avoid the power reduction, the amplifier should have a larger bias which inevitably has a larger power dissipation at low output power levels. The proposed bias boosting circuitry dynamically increases the bias of the power transistor as the output power increases. The amplifier has less power dissipation at low power levels with an increased maximum output power.

A monolithic Si PCS-CDMA power amplifier with an impedance-controllable biasing scheme

This paper for the first time presents a monolithic Si PCS-CDMA power amplifier (PA) capable of delivering 28.2 dBm output power with 30% power-added efficiency (PAE) and -45 dBc adjacent-channel-power ratio (ACPR) at 1.9 GHz and 3.6 V supply voltage. The PA implemented in a 30 GHz BiCMOS process incorporates a novel impedance-controllable biasing scheme to control class of operation and bias impedance of the output stage.