Slawomir Czerkas

Experimental test results of pattern placement metrology on photomasks with laser illumination source designed to address double patterning lithography challenges

Double Patterning Lithography techniques place significantly greater demand on the requirements for pattern placement accuracy on photomasks. The influence of the pellicle on plate bending is also a factor especially when the pellicle distortions are not repeatable from substrate to substrate. The combination of increased demand for greater accuracy and the influence of pellicle distortions are key factors in the need for high resolution through-pellicle in-die measurements on actual device features. The above requirements triggered development of a new generation registration metrology tool based on in-depth experience with the LMS IPRO4. This paper reports on the initial experimental results of DUV laser illumination on features of various sizes using unique measurement algorithms developed specifically for pattern placement measurements.

In-die mask registration for multi-patterning

193nm immersion lithography is the mainstream production technology for the 20nm and 14nm logic nodes. Considering multi-patterning as the technology to solve the very low k1 situation in the resolution equation puts extreme pressure on the intra-field overlay, to which mask registration error is a major error contributor. The International Technology Roadmap for Semiconductors (ITRS) requests a registration error below 4 nm for each mask of a multi-patterning set forming one layer on the wafer. For mask metrology at the 20nm and 14nm logic nodes, maintaining a precision-to-tolerance (P/T) ratio below 0.25 will be very challenging. Mask registration error impacts intra-field wafer overlay directly and has a major impact on wafer yield. We will discuss a solution to support full in-die registration metrology on reticles.

Improving mask metrology for semiconductor manufacture

In patterning semiconductor devices, the process of aligning critical layers on a wafer—the overlay—at 20nm half-pitch (half of the period from feature to feature in a periodic grid) requires error margins, or ‘budgets,’ of 4nm or less. To achieve this kind of performance, it may not be enough to characterize the overlay with a single number (3 ), measured on a relatively sparse grid of targets (artificial structures, such as crosses, which are added to the design to enable metrology). Furthermore, differences between the overlay on targets and that on device patterns need to be measured and controlled. The mask has always been one contributor to the wafer overlay budget. Yet, pattern placement (registration) on masks has traditionally been characterized by a single value, derived from measurement of fewer than 100 standard targets. It is not certain that this approach will guarantee future mask performance and, by association, future wafer performance. We require new tools and analyses, able to provide richer characterization of systematic and random mask errors.1 Measurements reveal that the actual mask quality with respect to registration depends on the number and the selection of mask measurement sites.2 Figure 1 shows a mask with registration measured at 700 sites, including a variety of different device features. The 3 is 4.9nm, but different subsamples of 170 sites, both of which have reasonable mask coverage, produce quite different 3 values. One subsample underestimates 3 at 3.9nm, while the other overestimates 3 at 6.1nm. Such estimates could lead to substandard masks appearing acceptable, or to good masks being rejected. Further evaluations reveal systematic pattern-dependent shifts (see Figure 2). Currently, these shifts are not recognized because measurements are taken on only one kind of standard target. Characterization using denser grids and a variety of Figure 1. Measuring subsamples of mask pattern placement (registration) at 170 sites reveals wide variations in the three-standarddeviation measure (3 ) of the overlay (the alignment of layers on the wafer). Here, the mask was measured at 700 sites with 3 of 4.9nm, but the subsamples produce 3 of 3.9nm (left) and 6.1nm (right), which may present inaccuracies when verifying mask quality.

In-Die Registration Measurement Using Novel Model-Based Approach for Advanced Technology Masks

In recent years, 193nm immersion lithography has been extended instead of adopting EUV lithography. And multi-patterning technology is now widely applied, which requires tighter specification as the pattern size gets smaller on advanced semiconductor devices. Regarding the mask registration metrology, it is necessary to consider some difficult challenges like tight repeatability and complex In-Die pattern measurement. In this study, the registration measurement capability was investigated on new registration metrology tool IPRO5+, and new measurement method called Model-Based measurement was evaluated. And the performance and the prospect for advanced technology masks of the IPRO5+ were discussed based on the evaluation results.