Slobodan Lubura

A modified dual current mode control method with an adaptive current bandwidth

Summary In this paper, a new adaptive dual current mode control method (ADCMC) is presented, being a result of the modification of existing dual current mode control (DCMC) by introducing an adaptive current bandwidth. The ADCMC offers several important advantages over DCMC, such as no peak-to-average error in the inductor current, better transient response of current loop, and improved line regulation. A detailed analysis of the proposed ADCMC is performed for three types of DC–DC power electronics converters: buck, boost, and non-inverting buck–boost converter. The performances of the ADCMC are tested with simulations and experiments. The obtained results confirm the analysis and validity of the proposed ADCMC method. Copyright

Implementation of Cordic Algorithm on FPGA Altera Cyclone

In paper is presented HDL Code generation of Cordic Algorithm in MATLAB/Simulink, using HDL Code generation tool, and its implementation on FPGA Altera Cyclone, using Altera Quartus II. There are also tested data types which Cordic uses, as well as time which is need for sine or cosine calculation of given angle, depending on these data types. With this information Cordic can be easily implemented in any digital system.

Closed Control Loop Implementation for Single Robot Axis on FPGA Platform

This paper deals with closed control loop implementation for robot single axis with DC motor on FPGA platform. Controlling algorithm is designed in Matlab/Simulink environment and its Custom Toolbox is specifically designed for the purpose of control structures development in real time. Torque is calculated on FPGA structure and brought to a motor which generates necessary PMW. On the motor axis is a pendulum which follows default trajectory. It is a stream of data obtained by calculating or recording robot axis position while moving it manually. Experimental results are also provided.

Encoder signal processing on FPGA platform realized in Matlab/DSP Builder

In this paper we described realization of digital assembly for processing of output signal from incremental encoder on FPGA platform in Matlab/DSP Builder. For the purpose of realization of the design and programming of FPGA circuit on development board DE2 we used Matlab/DSP Builder. Encoder functioning principle, accepting, processing and counting of impulses and acquiring velocity information through differentiating measured position are all described in detail. Functionality of realized design was verified through simulation in Matlab/DSP Builder and velocity (acquired through differentiating of measured position) was provided in experimental result (comparison of motor rotation speed acquired from encoder and tachogenerator). Experimental result confirms that chosen concept of encoder signal processing was correct.

Analysis of single-phase PLL with novel two-phase generator for grid-connected converters

It is very important for proper work of grid-connected converters to have accurate detection of phase angle, frequency and amplitude of grid voltage. Estimation of these grid parameters can be achieved using PLL (phase locked loop) based on SRF (synchronous reference frame) theory. This PLL should have robustness against noise and offset introduced by measurement and data conversion. This paper proposes an improved PLL alorithm that has excellent noise and offset rejection property. The main part of the proposed PLL is a novel two-phase generator which is used to obtain two quadrature signals for SRF block and PI regulator in closed control loop.

Adaptive delay bank filter for selective elimination of harmonics in SRF-PLL structures

This paper proposes the usage of adaptive delay bank (ADB) based on cascaded delayed signal cancellation (CDSC) structure for selective elimination of the harmonics in the synchronous reference frame phase locked loop (SRF-PLL) structures. The ADB is inserted inside the SRF-PLL structure and it is frequency adaptive, which is the advantage over CDSC structures which are used in PLL as pre-filters, not being adaptive at all. Detailed mathematical analysis and simulation results confirmed suggested method for selective harmonic elimination in PLL.

Development of a new controller with FPGA for PUMA 560 robot

Abstract In this paper is presented architecture of the controller for controlling the base configuration of PUMA 560 robot (three axes). Developed controller (designated for student education) has hardware part based on Altera Cyclon II FPGA chip implemented on DE2 development board and software part MATLAB® with corresponding toolboxes. Matlab with installed Robotics Toolbox was used for the purposes such as generating trajectory of movement, calculating inverse kinematics, gravity compensation and simulation of manipulator movements. The control structures were which have been previously devised in Matlab/DSP Builder using FPGA Real Time Toolbox were implemented on FPGA chip. Performed experimental results showed that proposed concept of the controller design satisfied appointed requirements such as easy simulation, programming and testing controller performances, so the next objective of research will be design of the improved control algorithms of robot and design of new Teachbox.

Experimental verification of single-phase PLL with novel two-phase generator for grid-connected converters

For proper work of grid-connected converters it is important to have accurate detection of phase angle, frequency and amplitude of grid voltage. Estimation of these grid parameters can be achieved using PLL (phase locked loop) based on SRF (synchronous reference frame) theory. This PLL should have robustness against noise and offset introduced by measurement and data conversion. This paper proposes an improved PLL algorithm that has excellent noise and offset rejection property. The main part of proposed PLL is a novel two-phase generator which is used to obtain two quadrature signals for SRF block and PI regulator in closed control loop. Performances of proposed PLL are verified through experimental results given in this paper.

Identification of Parameters for Robot PUMA 560

Design of FPGA based controller for robot PUMA 560 requires knowledge of a large number of robot parameters. Considering the fact that robot manufacturer has not published the parameters, many scientists presented their own parameter results. Considerate variability in reported results was observed in values for mass and center of mass and therefore it was recognized as a matter of scientific interest.

Unipolar switched bidirectional bridgeless power factor correction boost rectifier with adaptive dual current mode control

This paper proposes an application of adaptive dual current mode control (ADCMC) on bidirectional bridgeless power factor correction (BBPFC) boost rectifier with unipolar switching. The given simulation results confirm the benefits of the proposed control strategy of the BBPFC converter, primarily regarding the maintaining of the sine waveform of the average inductor current.