Slobodan Mijalković

Extraction and modeling of self-heating and mutual thermal coupling impedance of bipolar transistors

A measurement system comprised of an ultra-low-distortion function generator, lock-in amplifier, and semiconductor parameter analyzer is used for sensitive extraction of the small-signal thermal impedance network of bipolar devices and circuits. The extraction procedure is demonstrated through measurements on several silicon-on-glass NPN test structures. Behavioral modeling of the mutual thermal coupling obtained by fitting a multipole rational complex function to measured data is presented.

Using frequency response coherent structures for model-order reduction in microwave applications

An effective practical technique for model-order reduction of large-scale linear time-invariant problems in microwave applications is presented. The reduction is performed as the Galerkin projection onto a subspace of frequency response coherent structures that contain the spectrum of the system multiinput impulse response. The subspace basis is created by the proper orthogonal decomposition of the system transfer characteristics sampled at discrete frequency points. A reduced-order modeling of an integrated planar spiral transformer is used for practical verification and comparison to the standard moment matching subspace approach.

A component decomposition preconditioning for 3D stress analysis problems

A preconditioning methodology for an iterative solution of discrete stress analysis problems based on a space decomposition and subspace correction framework is analysed in this paper. The principle idea of our approach is a decomposition of a global discrete system into the series of subproblems each of which correspond to the different Cartesian co-ordinates of the solution (displacement) vector. This enables us to treat the matrix subproblems in a segregated way. A host of well-established scalar solvers can be employed for the solution of subproblems. In this paper we constrain ourselves to an approximate solution using the scalar algebraic multigrid (AMG) solver, while the subspace correction is performed either in block diagonal (Jacobi) or block lower triangular (Gauss–Seidel) fashion. The preconditioning methodology is justified theoretically for the case of the block-diagonal preconditioner using Korns inequality for estimating the ratio between the extremal eigenvalues of a preconditioned matrix. The effectiveness of the AMG-based preconditioner is tested on stress analysis 3D model problems that arise in microfabrication technology. The numerical results, which are in accordance with theoretical predictions, clearly demonstrate the superiority of a component decomposition AMG preconditioner over the standard ILU preconditioner, even for the problems with a relatively small number of degrees of freedom. Copyright

Application of an algebraic multigrid solver to process simulation problems

In this paper, the performance of a special algebraic multigrid (AMG) solver for the solution of stress analysis problems in process simulation has been investigated. The discrete stress analysis equations are generated directly by the process simulator. The practical simulation examples include stress analysis during natively growing and deposited material films. It is shown that approaches using the AMG solver as a preconditioner are better than standard iterative solvers with regard to computing times and convergence behavior. A further comparison demonstrates that these AMG approaches are faster than the SuperLU direct solver.

Advanced circuit and device modeling with verilog-A

The hardware description language Verilog-A is today de facto the standard language for compact circuit and device modeling and it is implemented in almost all major commercial SPICE-like circuit simulators. The goal of this paper is to present the principles and techniques for implementation of various circuit and device modeling constructs in Verilog-A. Practical examples include a mixed lumped element and network function based modeling of a bipolar transistor as well as a physical, PDE based, modeling of a PIN diode

Parameters extraction of a scalable Mextram model for high-speed SiGe HBTs

A methodology to perform a geometry scaling of Mextram parameters for high-speed SiGe HBTs has been presented. The scaling is based on the parameter sets of individual devices having different geometries and sheet resistance measurement data. The scaleable model results have been verified with CV, DC, Ft and S11, S21 results up to 40 GHz.

Mixed compact and behavior modeling using AHDL Verilog-A

The way from the compact model development to implementation into a commercial circuit simulator is often time consuming. Moreover, it is not always straightforward how to implement behavior models in SPICE-like simulators. A capability of the analog hardware description language (AHDL) Verilog-A to handle state-of-the-art compact bipolar transistor modeling mixed with behavioral substrate coupling modeling has been demonstrated.

A piecewise linear Galerkin approach to stress analysis of nearly incompressible materials

The displacement-based finite element analysis of nearly incompressible materials is susceptible to the volumetric locking and pressure instability. As an effective remedy for these problems, a Galerkin formulation of the stress governing equations based on separate weak statements for displacement and pressure, has been derived. Apart from the various existing techniques, like the non-conforming, high order, or mixed methods, the proposed Galerkin approach is inherently free from the constraints imposed on the selection of discrete approximation spaces and permits a robust and stable implementation of piecewise linear trial and test functions. The accuracy and stability of the method are tested on a model problem with the available closed-form solution.

Semiconductor Process Modeling

The sections in this article are 1 Physical Models 2 Discrete Models 3 Process Modeling and Simulation Tools 4 State of Technology and Future Trends Keywords: topography modeling; semiconductor structures; ion implantation; bulk particle transport; mechanical deformation models; front propagation techniques; grid generation; grid adaptation; discretization; process simulation tools; simulation

Effects of high field stresses on threshold voltage of CMOS transistors

Abstract In this paper, the threshold voltage instabilities of CMOS transistors under gate bias stress at high gate oxide electric fields have been investigated. It is shown that in presence of the negative gate bias stress threshold voltage of n -channel MOSTs decreases, while threshold voltage of p -channel MOSTs increases. These results are explained by positive fixed oxide charge increase due to hole tunneling from the silicon valence band into oxide hole traps. On the other hand, it is shown that in the presence of the positive gate bias stress threshold voltage of n -channel MOSTs decreases at the beginning as well, but after a certain time period starts to increase, while threshold voltage of p -channel MOSTs continuously increases. The initial threshold voltage behaviour is explained by positive fixed oxide charge increase as well; however, in this case it is caused by the electron tunneling from oxide electron traps into oxide conduction band. The later threshold voltage increase of n -channel MOSTs is explained by surface state charge increase due to tunnel current flowing through the oxide.