Sosaku Sawada

Development of Integration Process of InGaAs/InP Heterojunction Bipolar Transistors with InP-Passivated InGaAs pin Photodiodes

We have successfully developed a fabrication process for OEICs in which each device structure and performance can be optimized. We integrated InGaAs/InP HBTs and InP-passivated InGaAs pin PDs on a semi-insulating InP substrate using multi-epi growth process. For the PDs with a 60 mum mesa diameter, the capacitance of 0.2 pF and the dark current of 0.1 nA at a reverse bias voltage of 5 V were obtained. For the HBTs with a 5.6-mum2 emitter area, the current gain of 44, the turn-on voltage of 0.77 V, the cutoff frequency of 122 GHz, and the maximum oscillation frequency of 165 GHz at a collector current density of 1 mA/mum2 were obtained. The HBTs show good uniformity and HBTs near the pin PDs show the same characteristics as those of remote HBTs. The result promises that this process can be used in fabrication of high-speed OEICs for practical applications.

Monolithic integration of pin/HBT optical receiver with HBT comparator on InP substrate

In summary, a pin photodiode, a transimpedance-type preamplifier, and a comparator have been monolithically integrated on an InP substrate with pin/HBT integration technology. The receiver OEIC with a comparator showed a sensitivity of -36.0 dBm at a bit error rate of 1/spl times/10/sup -9/ for 125 Mb/s optical signals. The successful integration of digital circuits with analog circuits and optical components promises a realization of high-performance parallel optical interconnections in the near future.

Mesa-type InGaAs pin PDs with InP-Passivation Structure Monolithically Integrated with Resistors and Capacitors with Large Capacitance

We have successfully fabricated mesa-type InGaAs pin PDs with InP-passivation structure monolithically integrated with resistors and capacitors. As for the PD characteristics, the capacitance of 0.19 pF and the dark current of 0.2 nA at a reverse bias voltage of 5 V are obtained. By using the MIM/MIS stacked structure in the capacitors, a large capacitance of 91 pF is obtained on a chip area of 440 mum2. Although the capacitor is very large, it shows a good reliability and the estimated life time is 60 years at a bias voltage of 10 V and an ambient temperature of 125degC. The results promise the cost reduction and miniaturization of modules and systems for fiber optic communications.

Large-area Top-Illuminated InP-Passivated Mesa-type InGaAs pin Photodiodes for High-bit-rate Multi-mode Fiber Applications

We demonstrate top-illuminated InGaAs pin photodiodes with both a large area (φ56 μm) and low capacitance (212 fF) for 10 Gb/s MMF applications. The devices exhibit high- responsivity (0.88 A/W) and broad bandwidth (8.8 GHz).

A multichip packaged GaAs 16*16 parallel multiplier

A GaAs 16*16 bit parallel multiplier utilizing multichip packaging technology is demonstrated. This multichip approach is undertaken in an effort to realize GaAs ULSIs with high yield and reliability, using multiple smaller scale integrated circuits. The device is composed of four GaAs 8*8 expandable parallel multipliers and a multichip package (MCP). The developed 8*8 b multipliers consist of 1097 E/D DCFL gates each and have a 2.4-ns multiplication time. The developed MCP is composed of five layers of alumina ceramic which include 50- Omega strip lines. The multiplication time of this 16*16 b multichip multiplier is 7.6 ns, and the total production yield is 70%. >