Steffen Hornig

Current state of 300-mm lithography in a pilot line environment

SEMICONDUCTOR300 (SC300) is the first pilot manufacturing facility for 300 mm wafers in the world. This company, a joint venture between Infineon Technologies and Motorola, is working on developing a 300 mm manufacturing tool set. The pilot line contains a full compliment of tools for 0.24 micrometer ground rule 64 M DRAM manufacturing. The 64 M DRAM was chosen for the ability to easily benchmark against 200 mm 64 M DRAM manufacturing data from the sister factory. Currently, testing on structures with less than 0.20 micrometer ground rules is occurring the pilot line. In this paper we present the performance of the initial lithography tool set installed at SC300. Several lots of wafers with measurable yield have been produced. These lots have produced data on overlay, critical dimensions, and run-to-run, wafer-to-wafer and within-wafer performance of the various lithography layers. We now have preliminary data on the comparison of 200 mm tools to 300 mm tools in terms of footprint, throughput, reliability, and productivity gains for equivalent square centimeters of silicon. With this data we can start to predict what performance we should expect from 300 mm manufacturing lithography tools.

Performance of 300-mm lithography tools in a pilot production line

Semiconductor 300 is the first pilot manufacturing facility for 300mm wafers in the world. This company is a joint venture between Siemens and Motorola, formed for the purpose of developing a 300mm manufacturing tool set. The pilot line contains a full compliment of tools for DRAM manufacturing. This paper discusses the performance of the initial 300mm lithography tool set installed in our pilot line in Dresden, Germany. The product used for evaluating and debugging the tool set is a 0.25-micron ground rule 64 Meg DRAM. This was chosen for the ability to easily benchmark against 200mm DRAM manufacturing data. We have produced several lots of wafers with measurable yield. These lots have produced data on overlay, CD and run to run performance of the lithography tools on actual product. We have data on resist coating, and develop uniformity. With several lithography tools installed we have generated a large amount of mix and match data. In addition several challenges for successful lithography have surfaced related entirely to the increase in wafer size. Film, etch, polish and thermal non-uniformity have impacted the throughput and performance of the lithography tools. The installation of the first integrated 300mm pilot line has also produced data on the impact larger wafer size has on tool logistics, for example fab layout, installation schedules and wafer and lot transport. While technical data is always important, the main reason for converting to 300mm is economic. We now have preliminary data on the comparison of 200 tools to 300mm tools in terms of footprint, throughput, and productivity gains for equivalent square centimeters of silicon. With this data we can start to make preliminary recommendations for 300mm manufacturing tools.

Application of integrated scatterometry measurements for a wafer-level litho feedback loop in a high-volume 300 mm DRAM production environment

With critical dimensions in microelectronics devices shrinking to 70nm and below, CD metrology is becoming more and more critical, and additional measurement information will be needed, especially for sidewall profiles and profile height. Integrated scatterometry is, on the one hand, giving the needed measurement precision, and on the other hand, it enables more measurements than stand-alone metrology. Both high precision and large sampling are needed for future technology nodes. This paper shows results from several full volume DRAM applications of state-of-the-art technology nodes on 300 mm wafers. These applications include critical line/space (L/S) layers as 2D applications and contact-hole (CH) layers consisting of elliptical CH-like structures as critical 3D applications. The selected applications are significantly more challenging with respect to scatterometry model generation than the applications presented in previous papers [1, 2]. Simultaneously, they belong to the most critical lithography steps in DRAM manufacturing. In the experiments, the influences of both pre-processes and the litho cluster on Critical Dimension Uniformity (CDU) have been investigated. Possible impacts on Run-to-Run systems like Feed-back and Feed-forward loops will also be discussed. We show that using integrated scatterometry can significantly increase the productivity of lithography clusters.

Selected implications of photoresist processing in 300mm manfacturing

In our paper, we discuss implications currently relevant to 300mm resist processing in lithography. The large size of the wafers, and therefore the large volume of machine modules and media within these modules, demand tighter specifications and a careful re-consideration of design. Firstly, we investigated a novel resist development process based on a new developer dispense nozzle. The CD uniformity across the 300mm wafer thus achieved is compared to a common process. Based on this, we are able to make a preliminary recommendation for the photoresist development technology required for future, high-end semiconductor device manufacturing. Resist thickness fluctuations around the edge area of a silicon wafer typically occur if high spin speeds are applied during the photoresist coating process. 300mm coating processes are particularly prone to the occurrence of such spin marks as the operating range of applicable spin speeds is lower in comparison to processes applied to wafers of lower diameters. We show in our example how such local resist thickness fluctuations impact the product yield. Finally, a special type of micromasking defect was found to be particularly relevant to 300mm lithography layers. This doughnut-type defect detracts the yield of the semiconductor product. The defect has a distinct physical appearance and is precipitated onto the wafer as a hollow resin sphere. This defect has not yet been observed on our 200mm reference process. The occurrence of the defect directly depends on the matching of the air flows entering and leaving the 300mm coater cup. The mechanism of formation involves the presence of a photoresist-solvent aerosol.

Process performance comparisons on 300-mm i-line steppers, DUV stepper, and DUV scanners

SEMICONDUCTOR300 was the first pilot production facility for 300mm wafers in the world. This company, a joint venture between Infineon Technologies and Motorola, is working to develop a manufacturable 300mm wafer tool set. The lithography tools include I-line steppers, a DUV stepper, and two DUV scanners. These tools are used to build 64M DRAM devices and aggressive test vehicles. Data will be presented on the mix-and-matching performance between DUV scanners and I-line steppers. Process-related data on CD within-field and across wafer sampling for selected tool types were investigated. The process capability of the current tool set for 0.25 micrometers and 0.18 micrometers devices were compared. Resolution performance of the scanner with its 0.68 numerical aperture was studied. Dense and isolated printed pattern performance was measured with in-line metrology. 300mm wafers are sensitive to backside defectivity, and therefore the wafer chuck design plays an important role in achieving the desired pattern transfer performance. The performance of the different chuck types and their sensitivity to incoming backside wafer contamination levels was studied. Rework data was used to assist in characterizing the exposure dose matching and chuck type performance.

Effect of nonlinear errors on 300-mm wafer overlay performance

SEMICONDUCTOR3000 was the first pilot production facility for 300nm wafers in the world. This company, a joint venture between Infineon Technologies and Motorola, is working to develop a manufacturable 300mm wafer tool set. The lithography tools include I-line stepper, and two DUV scanners. These tools are used to build both 64M DRAM devices and aggressive test vehicles. This paper shows the influence of non-linear errors on 300nm wafers is much stronger than on 200mm wafers. The team determined the root causes for the stronger appearance of these effects and proposed solutions to improve the overlay performance.

Is lithography ready for 300 mm

SEMICONDUCTOR300 was the first pilot production facility for 300mm wafers in the world. This company, a joint venture between Infineon Technologies Motorola, started in early 1998 to develop processes and manufacture products using 300mm wafer tool set. The lithography tools include I-line steppers, as I-line scanner, a DUV stepper, and DUV scanners. All of these exposure tools are running in-line with a photoresist coat and develop track. The lithography tools are used to build 64Mb DRAM devices and aggressive test vehicles with design rules of 0.25 micrometers and below, in sufficient quantity to be able to assess the tool readiness. This paper present the history of technical improvements and roadblocks that have occurred on the 300mm lithography tool set since the start-up, and describe a methodology used to assess the tool performance.