Stephan Suckow

Infrared transparent graphene heater for silicon photonic integrated circuits.

Thermo-optical tuning of the refractive index is one of the pivotal operations performed in integrated silicon photonic circuits for thermal stabilization, compensation of fabrication tolerances, and implementation of photonic operations. Currently, heaters based on metal wires provide the temperature control in the silicon waveguide. The strong interaction of metal and light, however, necessitates a certain gap between the heater and the photonic structure to avoid significant transmission loss. Here we present a graphene heater that overcomes this constraint and enables an energy efficient tuning of the refractive index. We achieve a tuning power as low as 22 mW per free spectral range and fast response time of 3 µs, outperforming metal based waveguide heaters. Simulations support the experimental results and suggest that for graphene heaters the spacing to the silicon can be further reduced yielding the best possible energy efficiency and operation speed.

Improved charge transport through Si based multiple quantum wells with substoichiometric SiOx barrier layers

The vertical charge transport through Si/SiOx multiple quantum wells (QWs) is investigated. Upon thermal annealing, segregation of excess Si from the SiOx layers leads to the formation of highly conductive pathways between Si grains from adjacent QWs separated by ultrathin silicon oxide barriers with barrier heights of 0.53–0.65 eV. Compared to stoichiometric Si/SiO2 layer stacks, conductivity is increased by up to ten orders of magnitude, which opens the way to an efficient charge carrier extraction in photovoltaic systems with distinct quantum confinement.

Resonant and phonon-assisted tunneling transport through silicon quantum dots embedded in SiO2

Charge transport through SiO2∕Si∕SiO2 double-barrier structures (DBSs) and SiO2 single-barrier structures is investigated by low temperature I-V measurements. Resonant tunneling signatures accompanied by a negative differential conductance are observed if silicon quantum dots (Si QDs) are embedded in the amorphous SiO2 matrix. The I-V characteristics are correlated with the morphology of Si QDs extracted from transmission electron microscopy and photoluminescence. Evidence for phonon-assisted tunneling at low voltages has been found in the DBSs. These results show the potential but also the limitation for charge extraction from Si QDs embedded in SiO2.

Study of Nickel Silicide Formation and Associated Fill-Factor Loss Analysis for Silicon Solar Cells With Plated Ni-Cu Based Metallization

In this study, the impact of impurities incorporated into plated nickel seed layer on silicide formation and the influence of annealing temperature on the fill-factor (FF) loss of solar cells with Ni-Cu contacts is investigated. The silicide growth of electroless plated nickel seed layer is significantly retarded compared with literature data on physical-vapor-deposition (PVD)-based nickel annealed at 550 °C. X-ray photoelectron spectroscopy and X-ray diffraction reveal the presence of SiO2 at the Ni-Si interface and the formation of nickel phosphides in addition to nickel silicide. The retardation in silicide growth is attributed to the presence of (111) planes after the texturing process and contaminants in the seed layer. Varying the annealing temperature of fabricated cells from 350 °C to 425 °C led to a decrease in the average FF from 79.3% to 77.5%. The loss analysis is based on Suns-V oc measurements, illuminated current-voltage parameters, and dark current-voltage curve fitting based on a three-diode model. It reveals that the FF loss is dominated by increased junction recombination, whereas losses due to third-diode component become significant for annealing at 400 °C and higher temperatures. The results highlight the need to carefully tune the seed layer annealing parameters to the interface conditions and junction depth of solar cells.

Integrated perovskite lasers on a silicon nitride waveguide platform by cost-effective high throughput fabrication

Metal-halide perovskites are a class of solution processed materials with remarkable optoelectronic properties such as high photoluminescence quantum yields and long carrier lifetimes, which makes them promising for a wide range of efficient photonic devices. In this work, we demonstrate the first successful integration of a perovskite laser onto a silicon nitride photonic chip. High throughput, low cost optical lithography is used, followed by indirect structuring of the perovskite waveguide. We embed methylammonium lead tri-iodide (MAPbI3) in a pre-patterned race-track microresonator and couple the emitted light to an integrated photonic waveguide. We clearly observe the build-up of spectrally narrow lasing modes at room temperature upon a pump threshold fluence of 19.6 µJcm-2. Our results evidence the possibility of on-chip lasers based on metal-halide perovskites with industry relevance on a commercially available dielectric photonic platform, which is a step forward towards low-cost integrated photonic devices.

Towards the Predicted High Performance of Waveguide Integrated Electro-Refractive Phase Modulators Based on Graphene

Here in this work, we study the electro-refractive modulation of CVD grown single layer graphene placed on top of a silicon microring resonator biased using a polymer electrolyte gate. A voltage length product for a phase shift of π, VπL = 2.7 Vmm has been extracted, which is better compared to silicon depletion horizontal and interleaved pn junction type phase modulators and competitive with Silicon-Insulator-Silicon Capacitor modulators.

Stark effect at dislocations in silicon for modulation of a 1.5 μm light emitter

A MOS-LED and a p-n LED emitting based on the dislocation-related luminescence (DRL) at 1.5 micron were already demonstrated by the authors. Here we report recent observation of the Stark effect for the DRL in Si. Namely, a red/blue-shift of the DRL peak positions was observed in electro- and photo-luminescence when the electric field in the pn-LED was increased/lowered. Fitting the experimental data yields a strong characteristic coefficient of 0.0186 meV/(kV/cm)2. This effect may allow realization of a novel Si-based emitter and modulator combined in a single device.

Monolithically Integrated Perovskite Semiconductor Lasers on Silicon Photonic Chips by Scalable Top-Down Fabrication

Metal-halide perovskites are promising lasing materials for the realization of monolithically integrated laser sources, the key components of silicon photonic integrated circuits (PICs). Perovskites can be deposited from solution and require only low-temperature processing, leading to significant cost reduction and enabling new PIC architectures compared to state-of-the-art lasers realized through the costly and inefficient hybrid integration of III-V semiconductors. Until now, however, due to the chemical sensitivity of perovskites, no microfabrication process based on optical lithography (and, therefore, on existing semiconductor manufacturing infrastructure) has been established. Here, the first methylammonium lead iodide perovskite microdisc lasers monolithically integrated into silicon nitride PICs by such a top-down process are presented. The lasers show a record low lasing threshold of 4.7 μJcm-2 at room temperature for monolithically integrated lasers, which are complementary metal-oxide-semiconductor compatible and can be integrated in the back-end-of-line processes.

Perovskite laser integrated on a conventional Si 3 N 4 photonic platform

Silicon nitride (Si3N4) waveguide platforms [1,2] are interesting candidates for optical interconnects and sensing applications [3] thanks to high quality passive components, transparency for NIR and visible wavelengths and their compatibility with CMOS process technology. Unfortunately, no native light sources are available for Si3N4 platforms and the integration of active materials, i.e. III-V compounds, is costly and often not CMOS compatible. Metal-halide perovskites are a class of solution processed semiconductors suitable for lasing [4]. Thanks to low-cost deposition by spin coating and low temperature processing (below 100°C) they are a great option for industry relevant on-chip light sources. In this work we apply the MAPbI3 perovskite onto Si3N4 integrated chips to obtain, to our knowledge, the first integrated perovskite laser.

Acceleration of 3D numerical simulation of silicon solar cell using thread parallelism

We have investigated the potential to accelerate three-dimensional numeric simulation of silicon solar cell using thread parallelism. The device simulated is a rear side passivated cell with rear point contacts (PERC). The optical and electrical behaviour of the device was simulated with Sentaurus Device (formerly dessis). We show that the simulation run-time on a four socket Opteron 6168 machine is reduced down to 6% compared to the run-time without thread parallelism. Furthermore, limits of time reduction by varying the number of threads up to 48 are studied. Thereby, the number of threads for the optimum use of the hardware resources is determined.