Stephen E. Bello

Timing driven placement using complete path delays

The Timing Drive Placement (TDP) system balances wirability and timing constraints so that the final released design meets timing criteria. This is achieved by dynamically evaluating the timing of critical paths during placement. TDP is significant because convergence to a timed wirable solution early in the physical design cycle is achieved, or else it becomes apparent that logic changes are required.

Differential current switch—high performance at low power

The recent IBM System/390™ announcement includes six high-performance air-cooled models that use a low-power variation of emitter-coupled logic (ECL). This new logic family, called differential current switch (DCS), uses differential signal pairs to represent logic signals, and combines two-level cascode logic with dotting to implement a complete set of logic circuits. These DCS circuits are described in detail, and the relative value of the DCS and ECL logic families is discussed extensively.