Stephen L. Kosman

A large area 1.3-megapixel full-frame CCD image sensor with a lateral-overflow drain and a transparent gate electrode

A large-area, 1.3 million pixel, full-frame CCD (charge coupled device) image sensor has been developed that incorporates both a lateral-overflow drain (LOD) for antiblooming control and a transparent indium-tin oxide (ITO) gate electrode for increased photosensitivity. The LOD offers high responsivity, extremely linear photoresponse, and ultrahigh optical overload protection. The replacement of one polysilicon phase with ITO increases the quantum efficiency at 400 nm to 15.8% from the 1.5% for the standard double polysilicon gate electrode process. The LOD design allows for antiblooming suppression in excess of 43000 times the saturation signal while maintaining better than 1% nonlinearity.<<ETX>>

True two-phase CCD image sensors employing a transparent gate

This paper describes the performance of a family of full- frame sensor designed where a transparent electrode replaces one of the polysilicon gates. The sensors are all fabricated with a true two-phase buried channel CCD process that is optimized for operation in multi-pinned phase mode for low dark current. The true two-phase architecture provides many advantages such as progressive scan, square pixels, high charge capacity, and simplified drive requirements. The uncomplicated structure allows large area arrays to be fabricated with reasonable yield. Inclusion of a transparent gate increases the response by a factor of 10 at 400 nm and 50 percent at 600 nm.

High‐resolution interline image sensors using two‐phase CCD technology

Two interline, 30 frames/second, high‐resolution image sensors are described that use two‐phase charge coupled device (CCD) technology. One is a two‐megapixel, interlaced high‐definition television, sensor, and the other is a 1‐megapixel, progressive‐scan sensor for machine vision applications. These sensors include features such as dual‐horizontal CCD readout, antiblooming protection, electronic shutter capability, low smear, and no lag.©1994 John Wiley & Sons Inc

Recent Enhancements to Interline and Electron Multiplying CCD Image Sensors

This paper describes recent process modifications made to enhance the performance of interline and electron-multiplying charge-coupled-device (EMCCD) image sensors. By use of MeV ion implantation, quantum efficiency in the NIR region of the spectrum was increased by 2×, and image smear was reduced by 6 dB. By reducing the depth of the shallow photodiode (PD) implants, the photodiode-to-vertical-charge-coupled-device (VCCD) transfer gate voltage required for no-lag operation was reduced by 3 V, and the electronic shutter voltage was reduced by 9 V. The thinner, surface pinning layer also resulted in a reduction of smear by 4 dB in the blue portion of the visible spectrum. For EMCCDs, gain aging was eliminated by providing an oxide-only dielectric under its multiplication phase, while retaining the oxide-nitride-oxide (ONO) gate dielectrics elsewhere in the device.

29-mp 35-mm format interline CCD image sensor

This paper describes the design and performance of a new high-resolution 35 mm format CCD image sensor using an advanced 5.5 μm interline pixel. The pixels are arranged in a 6576 (H) × 4384 (V) format to support a 3:2 aspect ratio. This device is part of a family of devices that share a common architecture, pixel performance, and packaging arrangement. Unique to this device in the family is the implementation of a fast line dump structure and horizontal CCD lateral overflow drain.

New 5.5 μm Interline Transfer CCD Platform for Applied Imaging Markets

A new 5.5 &mgr;m pixel interline transfer CCD technology platform has been developed that offers significant improvements in performance while retaining the dynamic range, quantum efficiency, and responsivity available from the previous generation 7.4 µm pixel. Smear has been reduced to -100 dB, and a new quad-output architecture increases the maximum frame rate up to 120 fps for a 1 MPix sensor. This technology is now being deployed across a family of image sensors that share a common package and pin-out, facilitating faster camera design and product commercialization.

High performance 7.4-micron interline transfer CCD platform for applied imaging markets

Technology developed for a 5.5 μm pixel interline transfer CCD family has been incorporated into a new family of highperformance 7.4 μm pixel CCDs, providing significant improvements in several key performance parameters compared to both the 5.5 μm family as well as the previous generation of 7.4 μm pixel products. Smear in the new platform has been reduced to -115 dB, and frame rate has been doubled relative to the previous generation of 7.4 μm pixel products. Dynamic range in normal operation has been improved to 70 dB, and the platform supports a new extended dynamic range mode which provides 82 dB when binning 2 × 2. The new family leverages the package and pin-out configurations used in the 5.5 μm pixel family, allowing easy integration into existing camera designs.

Six-million-pixel full-frame true 2-f CCD image sensor incorporating transparent gate technology and optional antiblooming protection

This paper describes the performance of an advanced high- resolution full-frame architecture CCD imaging device for use in scientific, medical, and other high performance monochromatic digital still imaging applications. Of particular interest is the replacement of the polysilicon second gate electrode with that of a more spectrally transparent material, thereby dramatically improving device sensitivity. This has been achieved without compromising performance in other areas such as dark current, noise, transfer efficiency and, most importantly, yield. Devices have also been produced with and without antiblooming protection depending on an applications primary need for sensitivity or control of over-exposure conditions.